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author | Adam <you@example.com> | 2020-05-17 05:51:50 +0200 |
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committer | Adam <you@example.com> | 2020-05-17 05:51:50 +0200 |
commit | e611b132f9b8abe35b362e5870b74bce94a1e58e (patch) | |
tree | a5781d2ec0e085eeca33cf350cf878f2efea6fe5 /private/mvdm/softpc.new/obj.vdm/cdefine.inc | |
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Diffstat (limited to '')
-rw-r--r-- | private/mvdm/softpc.new/obj.vdm/cdefine.inc | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/private/mvdm/softpc.new/obj.vdm/cdefine.inc b/private/mvdm/softpc.new/obj.vdm/cdefine.inc new file mode 100644 index 000000000..9c043e527 --- /dev/null +++ b/private/mvdm/softpc.new/obj.vdm/cdefine.inc @@ -0,0 +1,69 @@ +# Check for Checked (dev) or Free (PROD) builds. + +!IF "$(NTDEBUG)" == "" || "$(NTDEBUG)" == "retail" + +SPC_VAR=-DPROD + +!ELSE + +!IF "$(PIG)" == "" + +!IF "$(HUNTER)" == "" + +SPC_VAR= + +!ELSE + +SPC_VAR=-DHUNTER + +!ENDIF + +!ELSE + +SPC_VAR=-DPIG + +!ENDIF + +!ENDIF + + +SOFTPC_TREE=$(BASEDIR)\private\mvdm\softpc.new + +# Set machine specific variables. Differences are for X86 vs. RISC + +!IF $(386) + +SPC_MC_DEF= -DMONITOR \ + -DC_VID \ + -DX86GFX +!ELSE + +# not an X86. At this point, all RISC architectures have the same defines. + +!IF "$(CCPU)" == "" +CPU_DEFS= -DCPU_40_STYLE +!ELSE +CPU_DEFS= -DCPU_40_STYLE -DCCPU -DC_VID +!ENDIF + +SPC_MC_DEF= $(CPU_DEFS) \ + -DNEW_CPU \ + -DSPC386 \ + -DSIM32 \ + -DV7VGA + + + + +#Amend include path to include CPU build system generated files +!if "$(NTDEBUG)" == "" +CPU_INCLUDES=$(SOFTPC_TREE)\host\inc\$(PROCESSOR_ARCHITECTURE)\prod +!else +CPU_INCLUDES=$(SOFTPC_TREE)\host\inc\$(PROCESSOR_ARCHITECTURE)\pig +!endif + +INCLUDES=$(CPU_INCLUDES);$(INCLUDES) + +!ENDIF + +C_DEFINES= $(SPC_VAR) $(SPC_MC_DEF) -DANSI |