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* arm_interface: Remove ARM11-isms from the CPU interfaceLioncash2018-09-181-6/+4
| | | | | | | | | This modifies the CPU interface to more accurately match an AArch64-supporting CPU as opposed to an ARM11 one. Two of the methods don't even make sense to keep around for this interface, as Adv Simd is used, rather than the VFP in the primary execution state. This is essentially a modernization change that should have occurred from the get-go.
* Port #4182 from Citra: "Prefix all size_t with std::"fearlessTobi2018-09-151-2/+2
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* core: Namespace all code in the arm subdirectory under the Core namespaceLioncash2018-08-251-0/+4
| | | | Gets all of these types and interfaces out of the global namespace.
* CPU: Save and restore the TPIDR_EL0 system register on every context switch.Subv2018-07-211-0/+2
| | | | Note that there's currently a dynarmic bug preventing this register from being written.
* scheduler: Clear exclusive state when switching contextsMerryMage2018-07-161-0/+1
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* GDB Stub Improvements (#508)Hedges2018-06-061-0/+4
| | | | | | | | | | * GDB Stub should work now. * Applied clang-format. * Replaced htonll with swap64. * Tidy up.
* Merge pull request #193 from N00byKing/3184_2_robotic_boogaloobunnei2018-03-191-1/+3
|\ | | | | Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
| * Implements citra-emu/citra#3184N00byKing2018-02-251-1/+3
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* | arm_interface: Support unmapping previously mapped memory.bunnei2018-03-161-0/+1
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* yuzu: Update license text to be consistent across project.bunnei2018-01-131-1/+1
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* arm_dynarmic: Implement coreMerryMage2018-01-121-3/+2
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* unicorn: Use for arm interface on Windows.bunnei2018-01-041-0/+39