From 9ff8d0f3e652fee83d9f4374d9f6e0aa1759dd88 Mon Sep 17 00:00:00 2001
From: GPUCode <geoster3d@gmail.com>
Date: Thu, 23 Nov 2023 11:26:06 +0200
Subject: Address more review comments

---
 src/core/arm/nce/patch.cpp | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

(limited to 'src/core/arm/nce/patch.cpp')

diff --git a/src/core/arm/nce/patch.cpp b/src/core/arm/nce/patch.cpp
index 30c3c6cdd..a08859d0b 100644
--- a/src/core/arm/nce/patch.cpp
+++ b/src/core/arm/nce/patch.cpp
@@ -90,6 +90,10 @@ void Patcher::PatchText(const Kernel::PhysicalMemory& program_image,
             WriteMsrHandler(AddRelocations(), oaknut::XReg{static_cast<int>(msr.GetRt())});
             continue;
         }
+
+        if (auto exclusive = Exclusive{inst}; exclusive.Verify()) {
+            m_exclusives.push_back(i);
+        }
     }
 
     // Determine patching mode for the final relocation step
@@ -163,11 +167,9 @@ void Patcher::RelocateAndCopy(Common::ProcessAddress load_base,
 
     // Cortex-A57 seems to treat all exclusives as ordered, but newer processors do not.
     // Convert to ordered to preserve this assumption.
-    for (u32 i = ModuleCodeIndex; i < static_cast<u32>(text_words.size()); i++) {
-        const u32 inst = text_words[i];
-        if (auto exclusive = Exclusive{inst}; exclusive.Verify()) {
-            text_words[i] = exclusive.AsOrdered();
-        }
+    for (const ModuleTextAddress i : m_exclusives) {
+        auto exclusive = Exclusive{text_words[i]};
+        text_words[i] = exclusive.AsOrdered();
     }
 
     // Copy to program image
-- 
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