From 3d592972dc3fd61cc88771b889eff237e4e03e0f Mon Sep 17 00:00:00 2001 From: bunnei Date: Tue, 20 Oct 2020 19:07:39 -0700 Subject: Revert "core: Fix clang build" --- src/core/arm/unicorn/arm_unicorn.cpp | 42 ++++++++++++++++++------------------ src/core/arm/unicorn/arm_unicorn.h | 8 +++---- 2 files changed, 25 insertions(+), 25 deletions(-) (limited to 'src/core/arm/unicorn') diff --git a/src/core/arm/unicorn/arm_unicorn.cpp b/src/core/arm/unicorn/arm_unicorn.cpp index c1612d626..1df3f3ed1 100644 --- a/src/core/arm/unicorn/arm_unicorn.cpp +++ b/src/core/arm/unicorn/arm_unicorn.cpp @@ -96,35 +96,35 @@ u64 ARM_Unicorn::GetPC() const { return val; } -u64 ARM_Unicorn::GetReg(std::size_t index) const { +u64 ARM_Unicorn::GetReg(int regn) const { u64 val{}; auto treg = UC_ARM64_REG_SP; - if (index <= 28) { - treg = static_cast(UC_ARM64_REG_X0 + static_cast(index)); - } else if (index < 31) { - treg = static_cast(UC_ARM64_REG_X29 + static_cast(index) - 29); + if (regn <= 28) { + treg = (uc_arm64_reg)(UC_ARM64_REG_X0 + regn); + } else if (regn < 31) { + treg = (uc_arm64_reg)(UC_ARM64_REG_X29 + regn - 29); } CHECKED(uc_reg_read(uc, treg, &val)); return val; } -void ARM_Unicorn::SetReg(std::size_t index, u64 value) { +void ARM_Unicorn::SetReg(int regn, u64 val) { auto treg = UC_ARM64_REG_SP; - if (index <= 28) { - treg = static_cast(UC_ARM64_REG_X0 + static_cast(index)); - } else if (index < 31) { - treg = static_cast(UC_ARM64_REG_X29 + static_cast(index) - 29); + if (regn <= 28) { + treg = (uc_arm64_reg)(UC_ARM64_REG_X0 + regn); + } else if (regn < 31) { + treg = (uc_arm64_reg)(UC_ARM64_REG_X29 + regn - 29); } - CHECKED(uc_reg_write(uc, treg, &value)); + CHECKED(uc_reg_write(uc, treg, &val)); } -u128 ARM_Unicorn::GetVectorReg(std::size_t /*index*/) const { +u128 ARM_Unicorn::GetVectorReg(int /*index*/) const { UNIMPLEMENTED(); static constexpr u128 res{}; return res; } -void ARM_Unicorn::SetVectorReg(std::size_t /*index*/, u128 /*value*/) { +void ARM_Unicorn::SetVectorReg(int /*index*/, u128 /*value*/) { UNIMPLEMENTED(); } @@ -217,8 +217,8 @@ void ARM_Unicorn::SaveContext(ThreadContext64& ctx) { CHECKED(uc_reg_read(uc, UC_ARM64_REG_PC, &ctx.pc)); CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &ctx.pstate)); - for (std::size_t i = 0; i < 29; ++i) { - uregs[i] = UC_ARM64_REG_X0 + static_cast(i); + for (auto i = 0; i < 29; ++i) { + uregs[i] = UC_ARM64_REG_X0 + i; tregs[i] = &ctx.cpu_registers[i]; } uregs[29] = UC_ARM64_REG_X29; @@ -228,8 +228,8 @@ void ARM_Unicorn::SaveContext(ThreadContext64& ctx) { CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31)); - for (std::size_t i = 0; i < 32; ++i) { - uregs[i] = UC_ARM64_REG_Q0 + static_cast(i); + for (int i = 0; i < 32; ++i) { + uregs[i] = UC_ARM64_REG_Q0 + i; tregs[i] = &ctx.vector_registers[i]; } @@ -244,8 +244,8 @@ void ARM_Unicorn::LoadContext(const ThreadContext64& ctx) { CHECKED(uc_reg_write(uc, UC_ARM64_REG_PC, &ctx.pc)); CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &ctx.pstate)); - for (std::size_t i = 0; i < 29; ++i) { - uregs[i] = UC_ARM64_REG_X0 + static_cast(i); + for (int i = 0; i < 29; ++i) { + uregs[i] = UC_ARM64_REG_X0 + i; tregs[i] = (void*)&ctx.cpu_registers[i]; } uregs[29] = UC_ARM64_REG_X29; @@ -255,8 +255,8 @@ void ARM_Unicorn::LoadContext(const ThreadContext64& ctx) { CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31)); - for (std::size_t i = 0; i < 32; ++i) { - uregs[i] = UC_ARM64_REG_Q0 + static_cast(i); + for (auto i = 0; i < 32; ++i) { + uregs[i] = UC_ARM64_REG_Q0 + i; tregs[i] = (void*)&ctx.vector_registers[i]; } diff --git a/src/core/arm/unicorn/arm_unicorn.h b/src/core/arm/unicorn/arm_unicorn.h index 1183e9541..810aff311 100644 --- a/src/core/arm/unicorn/arm_unicorn.h +++ b/src/core/arm/unicorn/arm_unicorn.h @@ -26,10 +26,10 @@ public: void SetPC(u64 pc) override; u64 GetPC() const override; - u64 GetReg(std::size_t index) const override; - void SetReg(std::size_t index, u64 value) override; - u128 GetVectorReg(std::size_t index) const override; - void SetVectorReg(std::size_t index, u128 value) override; + u64 GetReg(int index) const override; + void SetReg(int index, u64 value) override; + u128 GetVectorReg(int index) const override; + void SetVectorReg(int index, u128 value) override; u32 GetPSTATE() const override; void SetPSTATE(u32 pstate) override; VAddr GetTlsAddress() const override; -- cgit v1.2.3