From f7770b83d49f3ac791f095ade399705a4d04fe63 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 12 Jan 2015 14:12:05 -0500 Subject: dyncom: Fix 32-bit ASR shifts for immediates --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index c6a9baae3..b5e0993ed 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -176,13 +176,11 @@ unsigned int DPO(ArithmeticShiftRightByImmediate)(arm_processor *cpu, unsigned i unsigned int shifter_operand; int shift_imm = BITS(sht_oper, 7, 11); if (shift_imm == 0) { - if (BIT(rm, 31)) { + if (BIT(rm, 31) == 0) shifter_operand = 0; - cpu->shifter_carry_out = BIT(rm, 31); - } else { + else shifter_operand = 0xFFFFFFFF; - cpu->shifter_carry_out = BIT(rm, 31); - } + cpu->shifter_carry_out = BIT(rm, 31); } else { shifter_operand = static_cast(rm) >> shift_imm; cpu->shifter_carry_out = BIT(rm, shift_imm - 1); -- cgit v1.2.3