From c564c21668912b803947adddc166ff1315b218e4 Mon Sep 17 00:00:00 2001 From: Subv Date: Mon, 23 Feb 2015 18:24:35 -0500 Subject: GPU: Implemented bits 3 and 1 from the display transfer flags. Bit 3 is used to specify a raw copy, where no processing is done to the data, seems to behave exactly as a DMA. Bit 1 is used to specify whether to convert from a tiled format to a linear format or viceversa. --- src/core/hw/gpu.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/core/hw/gpu.h') diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h index 75f524465..ab1dcf91d 100644 --- a/src/core/hw/gpu.h +++ b/src/core/hw/gpu.h @@ -192,12 +192,13 @@ struct Regs { u32 flags; BitField< 0, 1, u32> flip_data; // flips input data horizontally (TODO) if true + BitField< 1, 1, u32> output_tiled; // Converts from linear to tiled format + BitField< 3, 1, u32> raw_copy; // Copies the data without performing any processing BitField< 8, 3, PixelFormat> input_format; BitField<12, 3, PixelFormat> output_format; - BitField<16, 1, u32> output_tiled; // stores output in a tiled format - // TODO: Not really sure if this actually scales, or even resizes at all. BitField<24, 1, u32> scale_horizontally; + BitField<25, 1, u32> scale_vertically; }; INSERT_PADDING_WORDS(0x1); -- cgit v1.2.3