From 2ed80f6b1e85823d7a13dfbb119545a0a0ec7427 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Sun, 11 Apr 2021 19:16:47 -0300
Subject: shader: Implement LOP CC

---
 src/shader_recompiler/backend/spirv/emit_spirv.h    |  6 +++---
 .../backend/spirv/emit_spirv_integer.cpp            | 21 +++++++++++++++------
 2 files changed, 18 insertions(+), 9 deletions(-)

(limited to 'src/shader_recompiler/backend/spirv')

diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index 04340fa70..150477ff6 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -280,9 +280,9 @@ Id EmitShiftRightLogical32(EmitContext& ctx, Id base, Id shift);
 Id EmitShiftRightLogical64(EmitContext& ctx, Id base, Id shift);
 Id EmitShiftRightArithmetic32(EmitContext& ctx, Id base, Id shift);
 Id EmitShiftRightArithmetic64(EmitContext& ctx, Id base, Id shift);
-Id EmitBitwiseAnd32(EmitContext& ctx, Id a, Id b);
-Id EmitBitwiseOr32(EmitContext& ctx, Id a, Id b);
-Id EmitBitwiseXor32(EmitContext& ctx, Id a, Id b);
+Id EmitBitwiseAnd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
+Id EmitBitwiseOr32(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
+Id EmitBitwiseXor32(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
 Id EmitBitFieldInsert(EmitContext& ctx, Id base, Id insert, Id offset, Id count);
 Id EmitBitFieldSExtract(EmitContext& ctx, IR::Inst* inst, Id base, Id offset, Id count);
 Id EmitBitFieldUExtract(EmitContext& ctx, IR::Inst* inst, Id base, Id offset, Id count);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index 8bf43b91d..944f1e429 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -111,16 +111,25 @@ Id EmitShiftRightArithmetic64(EmitContext& ctx, Id base, Id shift) {
     return ctx.OpShiftRightArithmetic(ctx.U64, base, shift);
 }
 
-Id EmitBitwiseAnd32(EmitContext& ctx, Id a, Id b) {
-    return ctx.OpBitwiseAnd(ctx.U32[1], a, b);
+Id EmitBitwiseAnd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
+    const Id result{ctx.OpBitwiseAnd(ctx.U32[1], a, b)};
+    SetZeroFlag(ctx, inst, result);
+    SetSignFlag(ctx, inst, result);
+    return result;
 }
 
-Id EmitBitwiseOr32(EmitContext& ctx, Id a, Id b) {
-    return ctx.OpBitwiseOr(ctx.U32[1], a, b);
+Id EmitBitwiseOr32(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
+    const Id result{ctx.OpBitwiseOr(ctx.U32[1], a, b)};
+    SetZeroFlag(ctx, inst, result);
+    SetSignFlag(ctx, inst, result);
+    return result;
 }
 
-Id EmitBitwiseXor32(EmitContext& ctx, Id a, Id b) {
-    return ctx.OpBitwiseXor(ctx.U32[1], a, b);
+Id EmitBitwiseXor32(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
+    const Id result{ctx.OpBitwiseXor(ctx.U32[1], a, b)};
+    SetZeroFlag(ctx, inst, result);
+    SetSignFlag(ctx, inst, result);
+    return result;
 }
 
 Id EmitBitFieldInsert(EmitContext& ctx, Id base, Id insert, Id offset, Id count) {
-- 
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