From dbc1e5cde79b9165605741e1ea7158513ef6499f Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Sat, 27 Mar 2021 23:01:28 -0400
Subject: shader: Implement I2I SAT

---
 src/shader_recompiler/backend/spirv/emit_spirv.h           | 2 ++
 src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | 8 ++++++++
 2 files changed, 10 insertions(+)

(limited to 'src/shader_recompiler/backend/spirv')

diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index 4f62af959..af6b8a68f 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -287,6 +287,8 @@ Id EmitSMin32(EmitContext& ctx, Id a, Id b);
 Id EmitUMin32(EmitContext& ctx, Id a, Id b);
 Id EmitSMax32(EmitContext& ctx, Id a, Id b);
 Id EmitUMax32(EmitContext& ctx, Id a, Id b);
+Id EmitSClamp32(EmitContext& ctx, Id value, Id min, Id max);
+Id EmitUClamp32(EmitContext& ctx, Id value, Id min, Id max);
 Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs);
 Id EmitULessThan(EmitContext& ctx, Id lhs, Id rhs);
 Id EmitIEqual(EmitContext& ctx, Id lhs, Id rhs);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index a9c5e9cca..37fc7c7a2 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -163,6 +163,14 @@ Id EmitUMax32(EmitContext& ctx, Id a, Id b) {
     return ctx.OpUMax(ctx.U32[1], a, b);
 }
 
+Id EmitSClamp32(EmitContext& ctx, Id value, Id min, Id max) {
+    return ctx.OpSClamp(ctx.U32[1], value, min, max);
+}
+
+Id EmitUClamp32(EmitContext& ctx, Id value, Id min, Id max) {
+    return ctx.OpUClamp(ctx.U32[1], value, min, max);
+}
+
 Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) {
     return ctx.OpSLessThan(ctx.U1, lhs, rhs);
 }
-- 
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