From 8a5e6fce072227edcf1c8af19c3749d695f483ac Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Wed, 21 Nov 2018 22:06:01 -0300
Subject: gl_shader_decompiler: Rename control codes to condition codes

---
 src/video_core/engines/shader_bytecode.h | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

(limited to 'src/video_core/engines/shader_bytecode.h')

diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index 83a6fd875..ee1710e8a 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -261,7 +261,7 @@ enum class FlowCondition : u64 {
     Fcsm_Tr = 0x1C, // TODO(bunnei): What is this used for?
 };
 
-enum class ControlCode : u64 {
+enum class ConditionCode : u64 {
     F = 0,
     LT = 1,
     EQ = 2,
@@ -569,7 +569,6 @@ union Instruction {
         BitField<39, 2, u64> tab5cb8_2;
         BitField<41, 3, u64> tab5c68_1;
         BitField<44, 2, u64> tab5c68_0;
-        BitField<47, 1, u64> cc;
         BitField<48, 1, u64> negate_b;
     } fmul;
 
@@ -831,7 +830,7 @@ union Instruction {
     union {
         BitField<0, 3, u64> pred0;
         BitField<3, 3, u64> pred3;
-        BitField<8, 5, ControlCode> cc; // flag in cc
+        BitField<8, 5, ConditionCode> cc; // flag in cc
         BitField<39, 3, u64> pred39;
         BitField<42, 1, u64> neg_pred39;
         BitField<45, 4, PredOperation> op; // op with pred39
@@ -1235,7 +1234,7 @@ union Instruction {
     BitField<60, 1, u64> is_b_gpr;
     BitField<59, 1, u64> is_c_gpr;
     BitField<20, 24, s64> smem_imm;
-    BitField<0, 5, ControlCode> flow_control_code;
+    BitField<0, 5, ConditionCode> flow_condition_code;
 
     Attribute attribute;
     Sampler sampler;
-- 
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