From 86ee1f61012efc365eedc43fb856890be14c88cc Mon Sep 17 00:00:00 2001 From: wwylele Date: Mon, 15 May 2017 18:14:03 +0300 Subject: pica: correct bit field length for some registers --- src/video_core/regs_framebuffer.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'src/video_core/regs_framebuffer.h') diff --git a/src/video_core/regs_framebuffer.h b/src/video_core/regs_framebuffer.h index 9ddc79243..a50bd4111 100644 --- a/src/video_core/regs_framebuffer.h +++ b/src/video_core/regs_framebuffer.h @@ -211,13 +211,14 @@ struct FramebufferRegs { BitField<0, 2, u32> allow_depth_stencil_write; // 0 = disable, else enable }; - DepthFormat depth_format; // TODO: Should be a BitField! + BitField<0, 2, DepthFormat> depth_format; + BitField<16, 3, ColorFormat> color_format; INSERT_PADDING_WORDS(0x4); - u32 depth_buffer_address; - u32 color_buffer_address; + BitField<0, 28, u32> depth_buffer_address; + BitField<0, 28, u32> color_buffer_address; union { // Apparently, the framebuffer width is stored as expected, -- cgit v1.2.3