From 61f9d9c4ab488a4a892ed107c56f85b84c775c17 Mon Sep 17 00:00:00 2001 From: bunnei Date: Fri, 15 Jun 2018 19:41:23 -0400 Subject: gl_shader_decompiler: Implement LOP32I LogicOperation PassB. --- .../renderer_opengl/gl_shader_decompiler.cpp | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) (limited to 'src/video_core/renderer_opengl/gl_shader_decompiler.cpp') diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index 7ce150fda..9093eca32 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp @@ -930,20 +930,26 @@ private: if (instr.alu.lop.invert_b) imm = ~imm; + std::string op_b = std::to_string(imm); + switch (instr.alu.lop.operation) { case Tegra::Shader::LogicOperation::And: { - regs.SetRegisterToInteger(instr.gpr0, true, 0, - '(' + op_a + " & " + std::to_string(imm) + ')', 1, 1); + regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " & " + op_b + ')', + 1, 1); break; } case Tegra::Shader::LogicOperation::Or: { - regs.SetRegisterToInteger(instr.gpr0, true, 0, - '(' + op_a + " | " + std::to_string(imm) + ')', 1, 1); + regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " | " + op_b + ')', + 1, 1); break; } case Tegra::Shader::LogicOperation::Xor: { - regs.SetRegisterToInteger(instr.gpr0, true, 0, - '(' + op_a + " ^ " + std::to_string(imm) + ')', 1, 1); + regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " ^ " + op_b + ')', + 1, 1); + break; + } + case Tegra::Shader::LogicOperation::PassB: { + regs.SetRegisterToInteger(instr.gpr0, true, 0, op_b, 1, 1); break; } default: -- cgit v1.2.3