From 170c8212bbb10129dfbaed8eb7ab67138c932af2 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Fri, 28 Dec 2018 20:00:36 -0300
Subject: shader_ir: Pass to decoder functions basic block's code

---
 src/video_core/shader/decode.cpp | 65 ++++++++++++++++++++--------------------
 1 file changed, 33 insertions(+), 32 deletions(-)

(limited to 'src/video_core/shader/decode.cpp')

diff --git a/src/video_core/shader/decode.cpp b/src/video_core/shader/decode.cpp
index 3265de869..6fdcac784 100644
--- a/src/video_core/shader/decode.cpp
+++ b/src/video_core/shader/decode.cpp
@@ -151,38 +151,39 @@ u32 ShaderIR::DecodeInstr(BasicBlock& bb, u32 pc) {
     UNIMPLEMENTED_IF_MSG(instr.pred.full_pred == Pred::NeverExecute,
                          "NeverExecute predicate not implemented");
 
-    static const std::map<OpCode::Type, u32 (ShaderIR::*)(BasicBlock & code, u32 pc)> decoders = {
-        {OpCode::Type::Arithmetic, &ShaderIR::DecodeArithmetic},
-        {OpCode::Type::ArithmeticImmediate, &ShaderIR::DecodeArithmeticImmediate},
-        {OpCode::Type::Bfe, &ShaderIR::DecodeBfe},
-        {OpCode::Type::Bfi, &ShaderIR::DecodeBfi},
-        {OpCode::Type::Shift, &ShaderIR::DecodeShift},
-        {OpCode::Type::ArithmeticInteger, &ShaderIR::DecodeArithmeticInteger},
-        {OpCode::Type::ArithmeticIntegerImmediate, &ShaderIR::DecodeArithmeticIntegerImmediate},
-        {OpCode::Type::ArithmeticHalf, &ShaderIR::DecodeArithmeticHalf},
-        {OpCode::Type::ArithmeticHalfImmediate, &ShaderIR::DecodeArithmeticHalfImmediate},
-        {OpCode::Type::Ffma, &ShaderIR::DecodeFfma},
-        {OpCode::Type::Hfma2, &ShaderIR::DecodeHfma2},
-        {OpCode::Type::Conversion, &ShaderIR::DecodeConversion},
-        {OpCode::Type::Memory, &ShaderIR::DecodeMemory},
-        {OpCode::Type::FloatSetPredicate, &ShaderIR::DecodeFloatSetPredicate},
-        {OpCode::Type::IntegerSetPredicate, &ShaderIR::DecodeIntegerSetPredicate},
-        {OpCode::Type::HalfSetPredicate, &ShaderIR::DecodeHalfSetPredicate},
-        {OpCode::Type::PredicateSetRegister, &ShaderIR::DecodePredicateSetRegister},
-        {OpCode::Type::PredicateSetPredicate, &ShaderIR::DecodePredicateSetPredicate},
-        {OpCode::Type::RegisterSetPredicate, &ShaderIR::DecodeRegisterSetPredicate},
-        {OpCode::Type::FloatSet, &ShaderIR::DecodeFloatSet},
-        {OpCode::Type::IntegerSet, &ShaderIR::DecodeIntegerSet},
-        {OpCode::Type::HalfSet, &ShaderIR::DecodeHalfSet},
-        {OpCode::Type::Video, &ShaderIR::DecodeVideo},
-        {OpCode::Type::Xmad, &ShaderIR::DecodeXmad},
-    };
-
-    std::vector<Node> code;
+    static const std::map<OpCode::Type, u32 (ShaderIR::*)(BasicBlock&, const BasicBlock&, u32)>
+        decoders = {
+            {OpCode::Type::Arithmetic, &ShaderIR::DecodeArithmetic},
+            {OpCode::Type::ArithmeticImmediate, &ShaderIR::DecodeArithmeticImmediate},
+            {OpCode::Type::Bfe, &ShaderIR::DecodeBfe},
+            {OpCode::Type::Bfi, &ShaderIR::DecodeBfi},
+            {OpCode::Type::Shift, &ShaderIR::DecodeShift},
+            {OpCode::Type::ArithmeticInteger, &ShaderIR::DecodeArithmeticInteger},
+            {OpCode::Type::ArithmeticIntegerImmediate, &ShaderIR::DecodeArithmeticIntegerImmediate},
+            {OpCode::Type::ArithmeticHalf, &ShaderIR::DecodeArithmeticHalf},
+            {OpCode::Type::ArithmeticHalfImmediate, &ShaderIR::DecodeArithmeticHalfImmediate},
+            {OpCode::Type::Ffma, &ShaderIR::DecodeFfma},
+            {OpCode::Type::Hfma2, &ShaderIR::DecodeHfma2},
+            {OpCode::Type::Conversion, &ShaderIR::DecodeConversion},
+            {OpCode::Type::Memory, &ShaderIR::DecodeMemory},
+            {OpCode::Type::FloatSetPredicate, &ShaderIR::DecodeFloatSetPredicate},
+            {OpCode::Type::IntegerSetPredicate, &ShaderIR::DecodeIntegerSetPredicate},
+            {OpCode::Type::HalfSetPredicate, &ShaderIR::DecodeHalfSetPredicate},
+            {OpCode::Type::PredicateSetRegister, &ShaderIR::DecodePredicateSetRegister},
+            {OpCode::Type::PredicateSetPredicate, &ShaderIR::DecodePredicateSetPredicate},
+            {OpCode::Type::RegisterSetPredicate, &ShaderIR::DecodeRegisterSetPredicate},
+            {OpCode::Type::FloatSet, &ShaderIR::DecodeFloatSet},
+            {OpCode::Type::IntegerSet, &ShaderIR::DecodeIntegerSet},
+            {OpCode::Type::HalfSet, &ShaderIR::DecodeHalfSet},
+            {OpCode::Type::Video, &ShaderIR::DecodeVideo},
+            {OpCode::Type::Xmad, &ShaderIR::DecodeXmad},
+        };
+
+    std::vector<Node> tmp_block;
     if (const auto decoder = decoders.find(opcode->get().GetType()); decoder != decoders.end()) {
-        pc = (this->*decoder->second)(code, pc);
+        pc = (this->*decoder->second)(tmp_block, bb, pc);
     } else {
-        pc = DecodeOther(code, pc);
+        pc = DecodeOther(tmp_block, bb, pc);
     }
 
     // Some instructions (like SSY) don't have a predicate field, they are always unconditionally
@@ -192,9 +193,9 @@ u32 ShaderIR::DecodeInstr(BasicBlock& bb, u32 pc) {
 
     if (can_be_predicated && pred_index != static_cast<u32>(Pred::UnusedIndex)) {
         bb.push_back(
-            Conditional(GetPredicate(pred_index, instr.negate_pred != 0), std::move(code)));
+            Conditional(GetPredicate(pred_index, instr.negate_pred != 0), std::move(tmp_block)));
     } else {
-        for (auto& node : code) {
+        for (auto& node : tmp_block) {
             bb.push_back(std::move(node));
         }
     }
-- 
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