From ba677ccb5a8ae0c889751fcdd40b0c9e818ad992 Mon Sep 17 00:00:00 2001
From: Fernando Sahmkow <fsahmkow27@gmail.com>
Date: Wed, 8 May 2019 10:32:30 -0400
Subject: texture_cache: Implement guest flushing

---
 src/video_core/texture_cache/surface_base.cpp | 19 +++++++++++--------
 src/video_core/texture_cache/texture_cache.h  | 14 ++++++++++++++
 2 files changed, 25 insertions(+), 8 deletions(-)

(limited to 'src/video_core/texture_cache')

diff --git a/src/video_core/texture_cache/surface_base.cpp b/src/video_core/texture_cache/surface_base.cpp
index 5e994cf08..dc5013240 100644
--- a/src/video_core/texture_cache/surface_base.cpp
+++ b/src/video_core/texture_cache/surface_base.cpp
@@ -63,6 +63,9 @@ void SurfaceBaseImpl::LoadBuffer(Tegra::MemoryManager& memory_manager,
                                  std::vector<u8>& staging_buffer) {
     MICROPROFILE_SCOPE(GPU_Load_Texture);
     const auto host_ptr{memory_manager.GetPointer(gpu_addr)};
+    if (!host_ptr) {
+        return;
+    }
     if (params.is_tiled) {
         ASSERT_MSG(params.block_width == 1, "Block width is defined as {} on texture target {}",
                    params.block_width, static_cast<u32>(params.target));
@@ -103,7 +106,10 @@ void SurfaceBaseImpl::LoadBuffer(Tegra::MemoryManager& memory_manager,
 void SurfaceBaseImpl::FlushBuffer(Tegra::MemoryManager& memory_manager,
                                   std::vector<u8>& staging_buffer) {
     MICROPROFILE_SCOPE(GPU_Flush_Texture);
-    auto host_ptr = memory_manager.GetPointer(gpu_addr);
+    const auto host_ptr{memory_manager.GetPointer(gpu_addr)};
+    if (!host_ptr) {
+        return;
+    }
     if (params.is_tiled) {
         ASSERT_MSG(params.block_width == 1, "Block width is defined as {}", params.block_width);
         for (u32 level = 0; level < params.num_levels; ++level) {
@@ -112,25 +118,22 @@ void SurfaceBaseImpl::FlushBuffer(Tegra::MemoryManager& memory_manager,
                         staging_buffer.data() + host_offset, level);
         }
     } else {
-        UNIMPLEMENTED();
-        /*
         ASSERT(params.target == SurfaceTarget::Texture2D);
         ASSERT(params.num_levels == 1);
 
-        const u32 bpp{params.GetFormatBpp() / 8};
+        const u32 bpp{params.GetBytesPerPixel()};
         const u32 copy_size{params.width * bpp};
         if (params.pitch == copy_size) {
-            std::memcpy(host_ptr, staging_buffer.data(), memory_size);
+            std::memcpy(host_ptr, staging_buffer.data(), guest_memory_size);
         } else {
             u8* start{host_ptr};
             const u8* read_to{staging_buffer.data()};
-            for (u32 h = params.GetHeight(); h > 0; --h) {
+            for (u32 h = params.height; h > 0; --h) {
                 std::memcpy(start, read_to, copy_size);
-                start += params.GetPitch();
+                start += params.pitch;
                 read_to += copy_size;
             }
         }
-        */
     }
 }
 
diff --git a/src/video_core/texture_cache/texture_cache.h b/src/video_core/texture_cache/texture_cache.h
index 554b9a228..422bf3e58 100644
--- a/src/video_core/texture_cache/texture_cache.h
+++ b/src/video_core/texture_cache/texture_cache.h
@@ -61,6 +61,20 @@ public:
         }
     }
 
+    void FlushRegion(CacheAddr addr, std::size_t size) {
+        auto surfaces = GetSurfacesInRegion(addr, size);
+        if (surfaces.empty()) {
+            return;
+        }
+        std::sort(surfaces.begin(), surfaces.end(),
+                  [](const TSurface& a, const TSurface& b) -> bool {
+                      return a->GetModificationTick() < b->GetModificationTick();
+                  });
+        for (const auto& surface : surfaces) {
+            FlushSurface(surface);
+        }
+    }
+
     TView GetTextureSurface(const Tegra::Texture::FullTextureInfo& config,
                             const VideoCommon::Shader::Sampler& entry) {
         const auto gpu_addr{config.tic.Address()};
-- 
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