From 3ec3cca4d8d4e1733cbc337b0499ad3bdcdf52b0 Mon Sep 17 00:00:00 2001 From: GPUCode Date: Mon, 20 Nov 2023 15:52:18 +0200 Subject: core: Define HAS_NCE macro --- src/core/CMakeLists.txt | 3 ++- src/core/device_memory.cpp | 2 +- src/core/hle/kernel/code_set.h | 5 +++++ src/core/hle/kernel/k_address_space_info.cpp | 2 +- src/core/hle/kernel/k_page_table_base.cpp | 2 +- src/core/hle/kernel/k_process.h | 6 +++++- src/core/hle/kernel/physical_core.cpp | 4 ++-- src/core/loader/deconstructed_rom_directory.cpp | 6 +++--- src/core/loader/nro.cpp | 6 +++--- src/core/loader/nso.cpp | 6 +++--- 10 files changed, 26 insertions(+), 16 deletions(-) (limited to 'src') diff --git a/src/core/CMakeLists.txt b/src/core/CMakeLists.txt index c5805ec61..e0bfb5b95 100644 --- a/src/core/CMakeLists.txt +++ b/src/core/CMakeLists.txt @@ -926,7 +926,8 @@ if (ENABLE_WEB_SERVICE) target_link_libraries(core PRIVATE web_service) endif() -if (ARCHITECTURE_arm64) +if (ARCHITECTURE_arm64 AND (ANDROID OR ${CMAKE_SYSTEM_NAME} STREQUAL "Linux")) + target_compile_definitions(core PRIVATE -DHAS_NCE) enable_language(C ASM) set(CMAKE_ASM_FLAGS "${CFLAGS} -x assembler-with-cpp") diff --git a/src/core/device_memory.cpp b/src/core/device_memory.cpp index 3a9151646..1aea56a99 100644 --- a/src/core/device_memory.cpp +++ b/src/core/device_memory.cpp @@ -6,7 +6,7 @@ namespace Core { -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE constexpr size_t VirtualReserveSize = 1ULL << 38; #else constexpr size_t VirtualReserveSize = 1ULL << 39; diff --git a/src/core/hle/kernel/code_set.h b/src/core/hle/kernel/code_set.h index d53da82f4..4d2d0098e 100644 --- a/src/core/hle/kernel/code_set.h +++ b/src/core/hle/kernel/code_set.h @@ -75,6 +75,7 @@ struct CodeSet final { return segments[2]; } +#ifdef HAS_NCE Segment& PatchSegment() { return patch_segment; } @@ -82,13 +83,17 @@ struct CodeSet final { const Segment& PatchSegment() const { return patch_segment; } +#endif /// The overall data that backs this code set. Kernel::PhysicalMemory memory; /// The segments that comprise this code set. std::array segments; + +#ifdef HAS_NCE Segment patch_segment; +#endif /// The entry point address for this code set. KProcessAddress entrypoint = 0; diff --git a/src/core/hle/kernel/k_address_space_info.cpp b/src/core/hle/kernel/k_address_space_info.cpp index 3235a7a37..23258071e 100644 --- a/src/core/hle/kernel/k_address_space_info.cpp +++ b/src/core/hle/kernel/k_address_space_info.cpp @@ -25,7 +25,7 @@ constexpr std::array AddressSpaceInfos{{ { .bit_width = 36, .address = 2_GiB , .size = 64_GiB - 2_GiB , .type = KAddressSpaceInfo::Type::MapLarge, }, { .bit_width = 36, .address = Size_Invalid, .size = 8_GiB , .type = KAddressSpaceInfo::Type::Heap, }, { .bit_width = 36, .address = Size_Invalid, .size = 6_GiB , .type = KAddressSpaceInfo::Type::Alias, }, -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE // With NCE, we use a 38-bit address space due to memory limitations. This should (safely) truncate ASLR region. { .bit_width = 39, .address = 128_MiB , .size = 256_GiB - 128_MiB, .type = KAddressSpaceInfo::Type::Map39Bit, }, #else diff --git a/src/core/hle/kernel/k_page_table_base.cpp b/src/core/hle/kernel/k_page_table_base.cpp index f7f1e8a3b..2b5e77ccf 100644 --- a/src/core/hle/kernel/k_page_table_base.cpp +++ b/src/core/hle/kernel/k_page_table_base.cpp @@ -96,7 +96,7 @@ constexpr Common::MemoryPermission ConvertToMemoryPermission(KMemoryPermission p if (True(perm & KMemoryPermission::UserWrite)) { perms |= Common::MemoryPermission::Write; } -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE if (True(perm & KMemoryPermission::UserExecute)) { perms |= Common::MemoryPermission::Execute; } diff --git a/src/core/hle/kernel/k_process.h b/src/core/hle/kernel/k_process.h index e5f796ac7..d8cd0fdde 100644 --- a/src/core/hle/kernel/k_process.h +++ b/src/core/hle/kernel/k_process.h @@ -112,7 +112,6 @@ private: std::array m_pinned_threads{}; std::array m_watchpoints{}; std::map m_debug_page_refcounts{}; - std::unordered_map m_post_handlers{}; std::atomic m_cpu_time{}; std::atomic m_num_process_switches{}; std::atomic m_num_thread_switches{}; @@ -121,6 +120,9 @@ private: std::atomic m_num_ipc_messages{}; std::atomic m_num_ipc_replies{}; std::atomic m_num_ipc_receives{}; +#ifdef HAS_NCE + std::unordered_map m_post_handlers{}; +#endif private: Result StartTermination(); @@ -468,9 +470,11 @@ public: static void Switch(KProcess* cur_process, KProcess* next_process); +#ifdef HAS_NCE std::unordered_map& GetPostHandlers() noexcept { return m_post_handlers; } +#endif public: // Attempts to insert a watchpoint into a free slot. Returns false if none are available. diff --git a/src/core/hle/kernel/physical_core.cpp b/src/core/hle/kernel/physical_core.cpp index 15434212e..073039825 100644 --- a/src/core/hle/kernel/physical_core.cpp +++ b/src/core/hle/kernel/physical_core.cpp @@ -4,7 +4,7 @@ #include "common/settings.h" #include "core/arm/dynarmic/arm_dynarmic_32.h" #include "core/arm/dynarmic/arm_dynarmic_64.h" -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE #include "core/arm/nce/arm_nce.h" #endif #include "core/core.h" @@ -33,7 +33,7 @@ PhysicalCore::PhysicalCore(std::size_t core_index, Core::System& system, KSchedu PhysicalCore::~PhysicalCore() = default; void PhysicalCore::Initialize(bool is_64_bit) { -#if defined(ARCHITECTURE_arm64) +#if defined(HAS_NCE) if (Settings::IsNceEnabled()) { m_arm_interface = std::make_unique(m_system, m_system.Kernel().IsMulticore(), m_core_index); diff --git a/src/core/loader/deconstructed_rom_directory.cpp b/src/core/loader/deconstructed_rom_directory.cpp index 31c00f0a3..a1344f1c4 100644 --- a/src/core/loader/deconstructed_rom_directory.cpp +++ b/src/core/loader/deconstructed_rom_directory.cpp @@ -15,7 +15,7 @@ #include "core/loader/deconstructed_rom_directory.h" #include "core/loader/nso.h" -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE #include "core/arm/nce/patch.h" #endif @@ -141,12 +141,12 @@ AppLoader_DeconstructedRomDirectory::LoadResult AppLoader_DeconstructedRomDirect std::size_t code_size{}; // Define an nce patch context for each potential module. -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE std::array module_patchers; #endif const auto GetPatcher = [&](size_t i) -> Core::NCE::Patcher* { -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE if (Settings::IsNceEnabled()) { return &module_patchers[i]; } diff --git a/src/core/loader/nro.cpp b/src/core/loader/nro.cpp index 49d4d7e43..2e7368349 100644 --- a/src/core/loader/nro.cpp +++ b/src/core/loader/nro.cpp @@ -22,7 +22,7 @@ #include "core/loader/nso.h" #include "core/memory.h" -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE #include "core/arm/nce/patch.h" #endif @@ -201,7 +201,7 @@ static bool LoadNroImpl(Core::System& system, Kernel::KProcess& process, program_image.resize(static_cast(program_image.size()) + bss_size); size_t image_size = program_image.size(); -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE const auto& code = codeset.CodeSegment(); // NROs always have a 39-bit address space. @@ -247,7 +247,7 @@ static bool LoadNroImpl(Core::System& system, Kernel::KProcess& process, // Relocate code patch and copy to the program_image if running under NCE. // This needs to be after LoadFromMetadata so we can use the process entry point. -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE if (Settings::IsNceEnabled()) { patch.RelocateAndCopy(process.GetEntryPoint(), code, program_image, &process.GetPostHandlers()); diff --git a/src/core/loader/nso.cpp b/src/core/loader/nso.cpp index 1ad2e917c..878c1c6cb 100644 --- a/src/core/loader/nso.cpp +++ b/src/core/loader/nso.cpp @@ -20,7 +20,7 @@ #include "core/loader/nso.h" #include "core/memory.h" -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE #include "core/arm/nce/patch.h" #endif @@ -93,7 +93,7 @@ std::optional AppLoader_NSO::LoadModule(Kernel::KProcess& process, Core:: // Allocate some space at the beginning if we are patching in PreText mode. const size_t module_start = [&]() -> size_t { -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE if (patch && patch->GetPatchMode() == Core::NCE::PatchMode::PreText) { return patch->GetSectionSize(); } @@ -155,7 +155,7 @@ std::optional AppLoader_NSO::LoadModule(Kernel::KProcess& process, Core:: std::copy(pi_header.begin() + sizeof(NSOHeader), pi_header.end(), program_image.data()); } -#ifdef ARCHITECTURE_arm64 +#ifdef HAS_NCE // If we are computing the process code layout and using nce backend, patch. const auto& code = codeset.CodeSegment(); if (patch && patch->GetPatchMode() == Core::NCE::PatchMode::None) { -- cgit v1.2.3