From dbfbe352e0b4dfc618be31a58d37c3f3606cab6a Mon Sep 17 00:00:00 2001 From: Nguyen Dac Nam Date: Sun, 22 Mar 2020 10:33:55 +0700 Subject: maxwell_3d: implement MME shadow RAM --- src/video_core/engines/maxwell_3d.h | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 8a9e9992e..5e531e21b 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -531,6 +531,13 @@ public: Fill = 0x1b02, }; + enum class ShadowRamControl : u32 { + Track = 0, + TrackWithFilter = 1, + Passthrough = 2, + Replay = 3, + }; + struct RenderTargetConfig { u32 address_high; u32 address_low; @@ -674,7 +681,9 @@ public: u32 bind; } macros; - INSERT_UNION_PADDING_WORDS(0x17); + ShadowRamControl shadow_ram_control; + + INSERT_UNION_PADDING_WORDS(0x16); Upload::Registers upload; struct { @@ -1265,6 +1274,9 @@ public: }; } regs{}; + /// Store temporary hw register values, used by some calls to restore state after a operation + Regs shadow_state; + static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size"); static_assert(std::is_trivially_copyable_v, "Maxwell3D Regs must be trivially copyable"); @@ -1458,6 +1470,7 @@ private: "Field " #field_name " has invalid position") ASSERT_REG_POSITION(macros, 0x45); +ASSERT_REG_POSITION(shadow_ram_control, 0x49); ASSERT_REG_POSITION(upload, 0x60); ASSERT_REG_POSITION(exec_upload, 0x6C); ASSERT_REG_POSITION(data_upload, 0x6D); -- cgit v1.2.3 From 63c2635e6fa3bcbff000cab7483cb94616db959e Mon Sep 17 00:00:00 2001 From: Nguyen Dac Nam Date: Sun, 22 Mar 2020 10:36:33 +0700 Subject: maxwell_3d: track shadow ram ctrl and hw reg value --- src/video_core/engines/maxwell_3d.cpp | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src') diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index ce536e29b..96cbe374c 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp @@ -160,6 +160,12 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) { ASSERT_MSG(method < Regs::NUM_REGS, "Invalid Maxwell3D register, increase the size of the Regs structure"); + // Keep track of the register value in shadow_regs when requested. + if (regs.shadow_ram_control == Regs::ShadowRamControl::Track || + regs.shadow_ram_control == Regs::ShadowRamControl::TrackWithFilter) { + shadow_state.reg_array[method] = method_call.argument; + } + if (regs.reg_array[method] != method_call.argument) { regs.reg_array[method] = method_call.argument; @@ -169,6 +175,10 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) { } switch (method) { + case MAXWELL3D_REG_INDEX(shadow_ram_control): { + shadow_state.shadow_ram_control = static_cast(method_call.argument); + break; + } case MAXWELL3D_REG_INDEX(macros.data): { ProcessMacroUpload(method_call.argument); break; -- cgit v1.2.3 From 01af036c1f653e3e25ab270d3b2a3e33849da0fd Mon Sep 17 00:00:00 2001 From: Nguyen Dac Nam Date: Sun, 22 Mar 2020 10:38:24 +0700 Subject: marco_interpreter: write hw value when shadow ram requested --- src/video_core/macro_interpreter.cpp | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src') diff --git a/src/video_core/macro_interpreter.cpp b/src/video_core/macro_interpreter.cpp index 42031d80a..181310606 100644 --- a/src/video_core/macro_interpreter.cpp +++ b/src/video_core/macro_interpreter.cpp @@ -328,6 +328,12 @@ void MacroInterpreter::SetMethodAddress(u32 address) { } void MacroInterpreter::Send(u32 value) { + // Use the tracked value in shadow_regs when requested. + if (method_address.address < Engines::Maxwell3D::Regs::NUM_REGS && + maxwell3d.shadow_state.shadow_ram_control == + Engines::Maxwell3D::Regs::ShadowRamControl::Replay) { + value = maxwell3d.shadow_state.reg_array[method_address.address]; + } maxwell3d.CallMethodFromMME({method_address.address, value}); // Increment the method address by the method increment. method_address.address.Assign(method_address.address.Value() + -- cgit v1.2.3 From 7051dc19020c4cc510e5ae0b490d037ae1ad9bfe Mon Sep 17 00:00:00 2001 From: namkazy Date: Sun, 22 Mar 2020 11:35:26 +0700 Subject: maxwell_3d: update comments for shadow ram usage --- src/video_core/engines/maxwell_3d.cpp | 2 +- src/video_core/engines/maxwell_3d.h | 4 ++++ src/video_core/macro_interpreter.cpp | 2 +- 3 files changed, 6 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 96cbe374c..7a3e21c6b 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp @@ -160,7 +160,7 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) { ASSERT_MSG(method < Regs::NUM_REGS, "Invalid Maxwell3D register, increase the size of the Regs structure"); - // Keep track of the register value in shadow_regs when requested. + // Keep track of the register value in shadow_state when requested. if (regs.shadow_ram_control == Regs::ShadowRamControl::Track || regs.shadow_ram_control == Regs::ShadowRamControl::TrackWithFilter) { shadow_state.reg_array[method] = method_call.argument; diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 5e531e21b..17119beda 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -532,9 +532,13 @@ public: }; enum class ShadowRamControl : u32 { + // write value to shadow ram Track = 0, + // write value to shadow ram ( with validation ??? ) TrackWithFilter = 1, + // only write to real hw register Passthrough = 2, + // write value from shadow ram to real hw register Replay = 3, }; diff --git a/src/video_core/macro_interpreter.cpp b/src/video_core/macro_interpreter.cpp index 181310606..861144c87 100644 --- a/src/video_core/macro_interpreter.cpp +++ b/src/video_core/macro_interpreter.cpp @@ -328,7 +328,7 @@ void MacroInterpreter::SetMethodAddress(u32 address) { } void MacroInterpreter::Send(u32 value) { - // Use the tracked value in shadow_regs when requested. + // Use the tracked value in shadow_state when requested. if (method_address.address < Engines::Maxwell3D::Regs::NUM_REGS && maxwell3d.shadow_state.shadow_ram_control == Engines::Maxwell3D::Regs::ShadowRamControl::Replay) { -- cgit v1.2.3 From 22f4268c2fbb8ca620b7eb18f98cf277537de6fc Mon Sep 17 00:00:00 2001 From: namkazy Date: Sun, 22 Mar 2020 12:02:54 +0700 Subject: maxwell_3d: this seem more correct. --- src/video_core/engines/maxwell_3d.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 7a3e21c6b..793ecedd2 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp @@ -161,8 +161,8 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) { "Invalid Maxwell3D register, increase the size of the Regs structure"); // Keep track of the register value in shadow_state when requested. - if (regs.shadow_ram_control == Regs::ShadowRamControl::Track || - regs.shadow_ram_control == Regs::ShadowRamControl::TrackWithFilter) { + if (shadow_state.shadow_ram_control == Regs::ShadowRamControl::Track || + shadow_state.shadow_ram_control == Regs::ShadowRamControl::TrackWithFilter) { shadow_state.reg_array[method] = method_call.argument; } -- cgit v1.2.3 From d4e93cf38cc933700e6236addbd6a3ef15eb9a57 Mon Sep 17 00:00:00 2001 From: namkazy Date: Sun, 22 Mar 2020 13:35:11 +0700 Subject: maxwell_3d: init shadow_state --- src/video_core/engines/maxwell_3d.cpp | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src') diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 793ecedd2..4e4373ad9 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp @@ -98,6 +98,8 @@ void Maxwell3D::InitializeRegisterDefaults() { regs.framebuffer_srgb = 1; regs.front_face = Maxwell3D::Regs::FrontFace::ClockWise; + shadow_state = regs; + mme_inline[MAXWELL3D_REG_INDEX(draw.vertex_end_gl)] = true; mme_inline[MAXWELL3D_REG_INDEX(draw.vertex_begin_gl)] = true; mme_inline[MAXWELL3D_REG_INDEX(vertex_buffer.count)] = true; -- cgit v1.2.3 From f66743cd0cd07e811b5a4340b6412d288b448c9c Mon Sep 17 00:00:00 2001 From: namkazy Date: Sun, 22 Mar 2020 13:41:16 +0700 Subject: maxwell_3d: change declaration order --- src/video_core/engines/maxwell_3d.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 17119beda..d24c9f657 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -1276,7 +1276,9 @@ public: }; std::array reg_array; }; - } regs{}; + }; + + Regs regs{}; /// Store temporary hw register values, used by some calls to restore state after a operation Regs shadow_state; -- cgit v1.2.3 From fc37672f26a6f5fb7e09874b0463682c0acf3ca5 Mon Sep 17 00:00:00 2001 From: namkazy Date: Sun, 22 Mar 2020 22:25:44 +0700 Subject: apply replay logic to all writes. remove replay from MacroInterpreter::Send (@fincs) --- src/video_core/engines/maxwell_3d.cpp | 15 +++++++++------ src/video_core/macro_interpreter.cpp | 6 ------ 2 files changed, 9 insertions(+), 12 deletions(-) (limited to 'src') diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 4e4373ad9..ba63b44b4 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp @@ -162,14 +162,17 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) { ASSERT_MSG(method < Regs::NUM_REGS, "Invalid Maxwell3D register, increase the size of the Regs structure"); + u32 arg = method_call.argument; // Keep track of the register value in shadow_state when requested. if (shadow_state.shadow_ram_control == Regs::ShadowRamControl::Track || shadow_state.shadow_ram_control == Regs::ShadowRamControl::TrackWithFilter) { - shadow_state.reg_array[method] = method_call.argument; + shadow_state.reg_array[method] = arg; + } else if (shadow_state.shadow_ram_control == Regs::ShadowRamControl::Replay) { + arg = shadow_state.reg_array[method]; } - if (regs.reg_array[method] != method_call.argument) { - regs.reg_array[method] = method_call.argument; + if (regs.reg_array[method] != arg) { + regs.reg_array[method] = arg; for (const auto& table : dirty.tables) { dirty.flags[table[method]] = true; @@ -182,11 +185,11 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) { break; } case MAXWELL3D_REG_INDEX(macros.data): { - ProcessMacroUpload(method_call.argument); + ProcessMacroUpload(arg); break; } case MAXWELL3D_REG_INDEX(macros.bind): { - ProcessMacroBind(method_call.argument); + ProcessMacroBind(arg); break; } case MAXWELL3D_REG_INDEX(firmware[4]): { @@ -262,7 +265,7 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) { } case MAXWELL3D_REG_INDEX(data_upload): { const bool is_last_call = method_call.IsLastCall(); - upload_state.ProcessData(method_call.argument, is_last_call); + upload_state.ProcessData(arg, is_last_call); if (is_last_call) { OnMemoryWrite(); } diff --git a/src/video_core/macro_interpreter.cpp b/src/video_core/macro_interpreter.cpp index 861144c87..42031d80a 100644 --- a/src/video_core/macro_interpreter.cpp +++ b/src/video_core/macro_interpreter.cpp @@ -328,12 +328,6 @@ void MacroInterpreter::SetMethodAddress(u32 address) { } void MacroInterpreter::Send(u32 value) { - // Use the tracked value in shadow_state when requested. - if (method_address.address < Engines::Maxwell3D::Regs::NUM_REGS && - maxwell3d.shadow_state.shadow_ram_control == - Engines::Maxwell3D::Regs::ShadowRamControl::Replay) { - value = maxwell3d.shadow_state.reg_array[method_address.address]; - } maxwell3d.CallMethodFromMME({method_address.address, value}); // Increment the method address by the method increment. method_address.address.Assign(method_address.address.Value() + -- cgit v1.2.3