5 files changed, 29 insertions, 50 deletions
diff --git a/src/core/CMakeLists.txt b/src/core/CMakeLists.txt
index 5caaee474..42b4be938 100644
--- a/src/core/CMakeLists.txt
+++ b/src/core/CMakeLists.txt
@@ -116,7 +116,6 @@ set(HEADERS
             arm/dyncom/arm_dyncom_thumb.h
             arm/skyeye_common/arm_regformat.h
             arm/skyeye_common/armdefs.h
-            arm/skyeye_common/armemu.h
             arm/skyeye_common/armmmu.h
             arm/skyeye_common/vfp/asm_vfp.h
             arm/skyeye_common/vfp/vfp.h
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 0072ae533..529c4ac70 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -6,7 +6,7 @@
 
 #include "common/make_unique.h"
 
-#include "core/arm/skyeye_common/armemu.h"
+#include "core/arm/skyeye_common/armdefs.h"
 #include "core/arm/skyeye_common/vfp/vfp.h"
 
 #include "core/arm/dyncom/arm_dyncom.h"
diff --git a/src/core/arm/interpreter/arminit.cpp b/src/core/arm/interpreter/arminit.cpp
index 680a94a39..4f7a48fab 100644
--- a/src/core/arm/interpreter/arminit.cpp
+++ b/src/core/arm/interpreter/arminit.cpp
@@ -17,7 +17,6 @@
 
 #include <cstring>
 #include "core/arm/skyeye_common/armdefs.h"
-#include "core/arm/skyeye_common/armemu.h"
 #include "core/arm/skyeye_common/vfp/vfp.h"
 
 /***************************************************************************\
diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h
index 470f9508d..08ece69b6 100644
--- a/src/core/arm/skyeye_common/armdefs.h
+++ b/src/core/arm/skyeye_common/armdefs.h
@@ -262,6 +262,34 @@ enum ConditionCode {
     NV = 15,
 };
 
+// Flags for use with the APSR.
+enum : u32 {
+	NBIT = (1U << 31U),
+	ZBIT = (1 << 30),
+	CBIT = (1 << 29),
+	VBIT = (1 << 28),
+	QBIT = (1 << 27),
+	JBIT = (1 << 24),
+	EBIT = (1 << 9),
+	ABIT = (1 << 8),
+	IBIT = (1 << 7),
+	FBIT = (1 << 6),
+	TBIT = (1 << 5),
+
+	// Masks for groups of bits in the APSR.
+	MODEBITS = 0x1F,
+	INTBITS = 0x1C0,
+};
+
+// Values for Emulate.
+enum {
+	STOP       = 0, // Stop
+	CHANGEMODE = 1, // Change mode
+	ONCE       = 2, // Execute just one iteration
+	RUN        = 3  // Continuous execution
+};
+
+
 extern bool AddOverflow(ARMword, ARMword, ARMword);
 extern bool SubOverflow(ARMword, ARMword, ARMword);
 
diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h
deleted file mode 100644
index 7e0965052..000000000
--- a/src/core/arm/skyeye_common/armemu.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*  armemu.h -- ARMulator emulation macros:  ARM6 Instruction Emulator.
-    Copyright (C) 1994 Advanced RISC Machines Ltd.
- 
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
- 
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
- 
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#pragma once
-
-#include "core/arm/skyeye_common/armdefs.h"
-
-// Flags for use with the APSR.
-enum : u32 {
-    NBIT = (1U << 31U),
-    ZBIT = (1 << 30),
-    CBIT = (1 << 29),
-    VBIT = (1 << 28),
-    QBIT = (1 << 27),
-    JBIT = (1 << 24),
-    EBIT = (1 << 9),
-    ABIT = (1 << 8),
-    IBIT = (1 << 7),
-    FBIT = (1 << 6),
-    TBIT = (1 << 5),
-
-    // Masks for groups of bits in the APSR.
-    MODEBITS = 0x1F,
-    INTBITS  = 0x1C0,
-};
-
-// Values for Emulate.
-enum {
-    STOP       = 0, // Stop
-    CHANGEMODE = 1, // Change mode
-    ONCE       = 2, // Execute just one interation
-    RUN        = 3  // Continuous execution
-};