3 files changed, 22 insertions, 1 deletions
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp
index be6b88f98..a9538ff43 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp
+++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp
@@ -24,6 +24,8 @@ u32 nvhost_ctrl_gpu::ioctl(Ioctl command, const std::vector<u8>& input, std::vec
         return ZCullGetCtxSize(input, output);
     case IoctlCommand::IocZcullGetInfo:
         return ZCullGetInfo(input, output);
+    case IoctlCommand::IocZbcSetTable:
+        return ZBCSetTable(input, output);
     }
     UNIMPLEMENTED_MSG("Unimplemented ioctl");
     return 0;
@@ -125,4 +127,13 @@ u32 nvhost_ctrl_gpu::ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>&
     return 0;
 }
 
+u32 nvhost_ctrl_gpu::ZBCSetTable(const std::vector<u8>& input, std::vector<u8>& output) {
+    NGLOG_WARNING(Service_NVDRV, "(STUBBED) called");
+    IoctlZbcSetTable params{};
+    std::memcpy(&params, input.data(), input.size());
+    // TODO(ogniK): What does this even actually do?
+    std::memcpy(output.data(), &params, output.size());
+    return 0;
+}
+
 } // namespace Service::Nvidia::Devices
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h
index 2d43598b1..1d5ba2e67 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h
+++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h
@@ -25,6 +25,7 @@ private:
         IocGetActiveSlotMaskCommand = 0x80084714,
         IocZcullGetCtxSizeCommand = 0x80044701,
         IocZcullGetInfo = 0x80284702,
+        IocZbcSetTable = 0x402C4703,
     };
 
     struct IoctlGpuCharacteristics {
@@ -117,11 +118,21 @@ private:
     static_assert(sizeof(IoctlNvgpuGpuZcullGetInfoArgs) == 40,
                   "IoctlNvgpuGpuZcullGetInfoArgs is incorrect size");
 
+    struct IoctlZbcSetTable {
+        u32_le color_ds[4];
+        u32_le color_l2[4];
+        u32_le depth;
+        u32_le format;
+        u32_le type;
+    };
+    static_assert(sizeof(IoctlZbcSetTable) == 44, "IoctlZbcSetTable is incorrect size");
+
     u32 GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output);
     u32 GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output);
     u32 GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output);
     u32 ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output);
     u32 ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output);
+    u32 ZBCSetTable(const std::vector<u8>& input, std::vector<u8>& output);
 };
 
 } // namespace Service::Nvidia::Devices
diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp
index 2eaece298..d72d6f760 100644
--- a/src/video_core/command_processor.cpp
+++ b/src/video_core/command_processor.cpp
@@ -36,7 +36,6 @@ void GPU::WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params)
     if (method == static_cast<u32>(BufferMethods::BindObject)) {
         // Bind the current subchannel to the desired engine id.
         NGLOG_DEBUG(HW_GPU, "Binding subchannel {} to engine {}", subchannel, value);
-        ASSERT(bound_engines.find(subchannel) == bound_engines.end());
         bound_engines[subchannel] = static_cast<EngineID>(value);
         return;
     }