diff options
Diffstat (limited to 'src/core')
| -rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 925 | ||||
| -rw-r--r-- | src/core/arm/interpreter/arminit.cpp | 288 | ||||
| -rw-r--r-- | src/core/arm/interpreter/armsupp.cpp | 80 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/armdefs.h | 455 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/armemu.h | 5 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/skyeye_defs.h | 82 |
6 files changed, 168 insertions, 1667 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index adc5c3a05..7114313d6 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -16,31 +16,11 @@ along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -//#include <util.h> // DEBUG() - #include "core/arm/skyeye_common/arm_regformat.h" #include "core/arm/skyeye_common/armdefs.h" #include "core/arm/skyeye_common/armemu.h" #include "core/hle/hle.h" -//#include "svc.h" - -//ichfly -//#define callstacker 1 - -//#include "skyeye_callback.h" -//#include "skyeye_bus.h" -//#include "sim_control.h" -//#include "skyeye_pref.h" -//#include "skyeye.h" -//#include "skyeye2gdb.h" -//#include "code_cov.h" - -//#include "iwmmxt.h" -//chy 2003-07-11: for debug instrs -//extern int skyeye_instr_debug; -extern FILE *skyeye_logfd; - static ARMword GetDPRegRHS (ARMul_State *, ARMword); static ARMword GetDPSRegRHS (ARMul_State *, ARMword); static void WriteR15 (ARMul_State *, ARMword); @@ -63,25 +43,13 @@ static unsigned MultiplyAdd64 (ARMul_State *, ARMword, int, int); static void Handle_Load_Double (ARMul_State *, ARMword); static void Handle_Store_Double (ARMul_State *, ARMword); -static int -handle_v6_insn (ARMul_State * state, ARMword instr); +static int handle_v6_insn (ARMul_State * state, ARMword instr); #define LUNSIGNED (0) /* unsigned operation */ #define LSIGNED (1) /* signed operation */ #define LDEFAULT (0) /* default : do nothing */ #define LSCC (1) /* set condition codes on result */ -#ifdef NEED_UI_LOOP_HOOK -/* How often to run the ui_loop update, when in use. */ -#define UI_LOOP_POLL_INTERVAL 0x32000 - -/* Counter for the ui_loop_hook update. */ -static int ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL; - -/* Actual hook to call to run through gdb's gui event loop. */ -extern int (*ui_loop_hook) (int); -#endif /* NEED_UI_LOOP_HOOK */ - /* Short-hand macros for LDR/STR. */ /* Store post decrement writeback. */ @@ -290,20 +258,8 @@ extern int (*ui_loop_hook) (int); break; \ } -/*ywc 2005-03-31*/ -//teawater add for arm2x86 2005.02.17------------------------------------------- -#ifdef DBCT -#include "dbct/tb.h" -#include "dbct/arm2x86_self.h" -#endif -//AJ2D-------------------------------------------------------------------------- - -//Diff register -unsigned int mirror_register_file[39]; - /* EMULATION of ARM6. */ -extern int debugmode; int ARMul_ICE_debug(ARMul_State *state,ARMword instr,ARMword addr); #ifdef MODE32 //chy 2006-04-12, for ICE debug @@ -312,59 +268,14 @@ int ARMul_ICE_debug(ARMul_State *state,ARMword instr,ARMword addr) return 0; } -static int dump = 0; ARMword ARMul_Debug(ARMul_State * state, ARMword pc, ARMword instr) { - /*printf("[%08x] ", pc); - arm11_Disasm32(pc);*/ - - /*if (pc >= 0x0010303C && pc <= 0x00103050) - { - printf("[%08x] = %08X = ", pc, instr); - arm11_Disasm32(pc); - arm11_Dump(); - }*/ - - //fprintf(stderr,"[%08x]\n", pc); - - //if (pc == 0x00240C88) - // arm11_Dump(); - - /*if (pc == 0x188e04) - { - DEBUG("read %08X %08X %016X %08X %08X from %08X", state->Reg[0], state->Reg[1], state->Reg[2] | state->Reg[3] << 32, mem_Read32(state->Reg[13]), mem_Read32(state->Reg[13] + 4), state->Reg[14]); - } - if (pc == 0x21222c) - { - arm11_Dump(); - mem_Dbugdump(); - }*/ - - /*if (pc == 0x0022D168) - { - int j = 0; - }*/ - - /*if (state->Reg[4] == 0x00105734) - { - printf("[%08x] ", pc); - arm11_Disasm32(pc); - }*/ - return 0; } -/* -void chy_debug() -{ - printf("SkyEye chy_deubeg begin\n"); -} -*/ -ARMword -ARMul_Emulate32 (ARMul_State * state) +ARMword ARMul_Emulate32(ARMul_State* state) #else -ARMword -ARMul_Emulate26 (ARMul_State * state) +ARMword ARMul_Emulate26(ARMul_State* state) #endif { /* The PC pipeline value depends on whether ARM @@ -383,39 +294,6 @@ ARMul_Emulate26 (ARMul_State * state) ARMword loaded_addr=0; ARMword have_bp=0; -#ifdef callstacker - char a[256]; -#endif - /* shenoubang */ - static int instr_sum = 0; - int reg_index = 0; -#if DIFF_STATE -//initialize all mirror register for follow mode - for (reg_index = 0; reg_index < 16; reg_index ++) { - mirror_register_file[reg_index] = state->Reg[reg_index]; - } - mirror_register_file[CPSR_REG] = state->Cpsr; - mirror_register_file[R13_SVC] = state->RegBank[SVCBANK][13]; - mirror_register_file[R14_SVC] = state->RegBank[SVCBANK][14]; - mirror_register_file[R13_ABORT] = state->RegBank[ABORTBANK][13]; - mirror_register_file[R14_ABORT] = state->RegBank[ABORTBANK][14]; - mirror_register_file[R13_UNDEF] = state->RegBank[UNDEFBANK][13]; - mirror_register_file[R14_UNDEF] = state->RegBank[UNDEFBANK][14]; - mirror_register_file[R13_IRQ] = state->RegBank[IRQBANK][13]; - mirror_register_file[R14_IRQ] = state->RegBank[IRQBANK][14]; - mirror_register_file[R8_FIRQ] = state->RegBank[FIQBANK][8]; - mirror_register_file[R9_FIRQ] = state->RegBank[FIQBANK][9]; - mirror_register_file[R10_FIRQ] = state->RegBank[FIQBANK][10]; - mirror_register_file[R11_FIRQ] = state->RegBank[FIQBANK][11]; - mirror_register_file[R12_FIRQ] = state->RegBank[FIQBANK][12]; - mirror_register_file[R13_FIRQ] = state->RegBank[FIQBANK][13]; - mirror_register_file[R14_FIRQ] = state->RegBank[FIQBANK][14]; - mirror_register_file[SPSR_SVC] = state->Spsr[SVCBANK]; - mirror_register_file[SPSR_ABORT] = state->Spsr[ABORTBANK]; - mirror_register_file[SPSR_UNDEF] = state->Spsr[UNDEFBANK]; - mirror_register_file[SPSR_IRQ] = state->Spsr[IRQBANK]; - mirror_register_file[SPSR_FIRQ] = state->Spsr[FIQBANK]; -#endif /* Execute the next instruction. */ if (state->NextInstr < PRIMEPIPE) { decoded = state->decoded; @@ -533,392 +411,38 @@ ARMul_Emulate26 (ARMul_State * state) //chy 2006-04-12, for ICE debug have_bp=ARMul_ICE_debug(state,instr,pc); -#if 0 - decoded = - ARMul_LoadInstrS (state, pc + (isize), isize); -#endif + decoded_addr=pc+isize; -#if 0 - loaded = ARMul_LoadInstrS (state, pc + (isize * 2), - isize); -#endif + loaded_addr=pc + isize * 2; NORMALCYCLE; if (have_bp) goto TEST_EMULATE; break; } -#if 0 - int idx = 0; - printf("pc:%x\n", pc); - for (; idx < 17; idx ++) { - printf("R%d:%x\t", idx, state->Reg[idx]); - } - printf("\n"); -#endif instr = ARMul_LoadInstrN (state, pc, isize); state->last_instr = state->CurrInstr; state->CurrInstr = instr; ARMul_Debug(state, pc, instr); -#if 0 - if((state->NumInstrs % 10000000) == 0) - printf("---|%p|--- %lld\n", pc, state->NumInstrs); - if(state->NumInstrs > (3000000000)) { - static int flag = 0; - if(pc == 0x8032ccc4) { - flag = 300; - } - if(flag) { - int idx = 0; - printf("------------------------------------\n"); - printf("pc:%x\n", pc); - for (; idx < 17; idx ++) { - printf("R%d:%x\t", idx, state->Reg[idx]); - } - printf("\nN:%d\t Z:%d\t C:%d\t V:%d\n", state->NFlag, state->ZFlag, state->CFlag, state->VFlag); - printf("\n"); - printf("------------------------------------\n"); - flag--; - } - } -#endif -#if DIFF_STATE - fprintf(state->state_log, "PC:0x%x\n", pc); - if (pc && (pc + 8) != state->Reg[15]) { - printf("lucky dog\n"); - printf("pc is %x, R15 is %x\n", pc, state->Reg[15]); - //exit(-1); - } - for (reg_index = 0; reg_index < 16; reg_index ++) { - if (state->Reg[reg_index] != mirror_register_file[reg_index]) { - fprintf(state->state_log, "R%d:0x%x\n", reg_index, state->Reg[reg_index]); - mirror_register_file[reg_index] = state->Reg[reg_index]; - } - } - if (state->Cpsr != mirror_register_file[CPSR_REG]) { - fprintf(state->state_log, "Cpsr:0x%x\n", state->Cpsr); - mirror_register_file[CPSR_REG] = state->Cpsr; - } - if (state->RegBank[SVCBANK][13] != mirror_register_file[R13_SVC]) { - fprintf(state->state_log, "R13_SVC:0x%x\n", state->RegBank[SVCBANK][13]); - mirror_register_file[R13_SVC] = state->RegBank[SVCBANK][13]; - } - if (state->RegBank[SVCBANK][14] != mirror_register_file[R14_SVC]) { - fprintf(state->state_log, "R14_SVC:0x%x\n", state->RegBank[SVCBANK][14]); - mirror_register_file[R14_SVC] = state->RegBank[SVCBANK][14]; - } - if (state->RegBank[ABORTBANK][13] != mirror_register_file[R13_ABORT]) { - fprintf(state->state_log, "R13_ABORT:0x%x\n", state->RegBank[ABORTBANK][13]); - mirror_register_file[R13_ABORT] = state->RegBank[ABORTBANK][13]; - } - if (state->RegBank[ABORTBANK][14] != mirror_register_file[R14_ABORT]) { - fprintf(state->state_log, "R14_ABORT:0x%x\n", state->RegBank[ABORTBANK][14]); - mirror_register_file[R14_ABORT] = state->RegBank[ABORTBANK][14]; - } - if (state->RegBank[UNDEFBANK][13] != mirror_register_file[R13_UNDEF]) { - fprintf(state->state_log, "R13_UNDEF:0x%x\n", state->RegBank[UNDEFBANK][13]); - mirror_register_file[R13_UNDEF] = state->RegBank[UNDEFBANK][13]; - } - if (state->RegBank[UNDEFBANK][14] != mirror_register_file[R14_UNDEF]) { - fprintf(state->state_log, "R14_UNDEF:0x%x\n", state->RegBank[UNDEFBANK][14]); - mirror_register_file[R14_UNDEF] = state->RegBank[UNDEFBANK][14]; - } - if (state->RegBank[IRQBANK][13] != mirror_register_file[R13_IRQ]) { - fprintf(state->state_log, "R13_IRQ:0x%x\n", state->RegBank[IRQBANK][13]); - mirror_register_file[R13_IRQ] = state->RegBank[IRQBANK][13]; - } - if (state->RegBank[IRQBANK][14] != mirror_register_file[R14_IRQ]) { - fprintf(state->state_log, "R14_IRQ:0x%x\n", state->RegBank[IRQBANK][14]); - mirror_register_file[R14_IRQ] = state->RegBank[IRQBANK][14]; - } - if (state->RegBank[FIQBANK][8] != mirror_register_file[R8_FIRQ]) { - fprintf(state->state_log, "R8_FIRQ:0x%x\n", state->RegBank[FIQBANK][8]); - mirror_register_file[R8_FIRQ] = state->RegBank[FIQBANK][8]; - } - if (state->RegBank[FIQBANK][9] != mirror_register_file[R9_FIRQ]) { - fprintf(state->state_log, "R9_FIRQ:0x%x\n", state->RegBank[FIQBANK][9]); - mirror_register_file[R9_FIRQ] = state->RegBank[FIQBANK][9]; - } - if (state->RegBank[FIQBANK][10] != mirror_register_file[R10_FIRQ]) { - fprintf(state->state_log, "R10_FIRQ:0x%x\n", state->RegBank[FIQBANK][10]); - mirror_register_file[R10_FIRQ] = state->RegBank[FIQBANK][10]; - } - if (state->RegBank[FIQBANK][11] != mirror_register_file[R11_FIRQ]) { - fprintf(state->state_log, "R11_FIRQ:0x%x\n", state->RegBank[FIQBANK][11]); - mirror_register_file[R11_FIRQ] = state->RegBank[FIQBANK][11]; - } - if (state->RegBank[FIQBANK][12] != mirror_register_file[R12_FIRQ]) { - fprintf(state->state_log, "R12_FIRQ:0x%x\n", state->RegBank[FIQBANK][12]); - mirror_register_file[R12_FIRQ] = state->RegBank[FIQBANK][12]; - } - if (state->RegBank[FIQBANK][13] != mirror_register_file[R13_FIRQ]) { - fprintf(state->state_log, "R13_FIRQ:0x%x\n", state->RegBank[FIQBANK][13]); - mirror_register_file[R13_FIRQ] = state->RegBank[FIQBANK][13]; - } - if (state->RegBank[FIQBANK][14] != mirror_register_file[R14_FIRQ]) { - fprintf(state->state_log, "R14_FIRQ:0x%x\n", state->RegBank[FIQBANK][14]); - mirror_register_file[R14_FIRQ] = state->RegBank[FIQBANK][14]; - } - if (state->Spsr[SVCBANK] != mirror_register_file[SPSR_SVC]) { - fprintf(state->state_log, "SPSR_SVC:0x%x\n", state->Spsr[SVCBANK]); - mirror_register_file[SPSR_SVC] = state->RegBank[SVCBANK]; - } - if (state->Spsr[ABORTBANK] != mirror_register_file[SPSR_ABORT]) { - fprintf(state->state_log, "SPSR_ABORT:0x%x\n", state->Spsr[ABORTBANK]); - mirror_register_file[SPSR_ABORT] = state->RegBank[ABORTBANK]; - } - if (state->Spsr[UNDEFBANK] != mirror_register_file[SPSR_UNDEF]) { - fprintf(state->state_log, "SPSR_UNDEF:0x%x\n", state->Spsr[UNDEFBANK]); - mirror_register_file[SPSR_UNDEF] = state->RegBank[UNDEFBANK]; - } - if (state->Spsr[IRQBANK] != mirror_register_file[SPSR_IRQ]) { - fprintf(state->state_log, "SPSR_IRQ:0x%x\n", state->Spsr[IRQBANK]); - mirror_register_file[SPSR_IRQ] = state->RegBank[IRQBANK]; - } - if (state->Spsr[FIQBANK] != mirror_register_file[SPSR_FIRQ]) { - fprintf(state->state_log, "SPSR_FIRQ:0x%x\n", state->Spsr[FIQBANK]); - mirror_register_file[SPSR_FIRQ] = state->RegBank[FIQBANK]; - } -#endif - -#if 0 - uint32_t alex = 0; - static int flagged = 0; - if ((flagged == 0) && (pc == 0xb224)) { - flagged++; - } - if ((flagged == 1) && (pc == 0x1a800)) { - flagged++; - } - if (flagged == 3) { - printf("---|%p|--- %x\n", pc, state->NumInstrs); - for (alex = 0; alex < 15; alex++) { - printf("R%02d % 8x\n", alex, state->Reg[alex]); - } - printf("R%02d % 8x\n", alex, state->Reg[alex] - 8); - printf("CPS %x%07x\n", (state->NFlag<<3 | state->ZFlag<<2 | state->CFlag<<1 | state->VFlag), state->Cpsr & 0xfffffff); - } else { - if (state->NumInstrs < 0x400000) { - //exit(-1); - } - } -#endif - - /*if (state->EventSet) - ARMul_EnvokeEvent (state);*/ - -#if 0 - /* do profiling for code coverage */ - if (skyeye_config.code_cov.prof_on) - cov_prof(EXEC_FLAG, pc); -#endif -//2003-07-11 chy: for test -#if 0 - if (skyeye_config.log.logon >= 1) { - if (state->NumInstrs >= skyeye_config.log.start && - state->NumInstrs <= skyeye_config.log.end) { - static int mybegin = 0; - static int myinstrnum = 0; - if (mybegin == 0) - mybegin = 1; -#if 0 - if (state->NumInstrs == 3695) { - printf ("***********SKYEYE: numinstr = 3695\n"); - } - static int mybeg2 = 0; - static int mybeg3 = 0; - static int mybeg4 = 0; - static int mybeg5 = 0; - - if (pc == 0xa0008000) { - //mybegin=1; - printf ("************SKYEYE: real vmlinux begin now numinstr is %llu ****************\n", state->NumInstrs); - } - //chy 2003-09-02 test fiq - if (state->NumInstrs == 67347000) { - printf ("***********SKYEYE: numinstr = 67347000, begin log\n"); - mybegin = 1; - } - if (pc == 0xc00087b4) { //numinstr=67348714 - mybegin = 1; - printf ("************SKYEYE: test irq now numinstr is %llu ****************\n", state->NumInstrs); - } - if (pc == 0xc00087b8) { //in start_kernel::sti() - mybeg4 = 1; - printf ("************SKYEYE: startkerenl: sti now numinstr is %llu ********\n", state->NumInstrs); - } - /*if (pc==0xc001e4f4||pc==0xc001e4f8||pc==0xc001e4fc||pc==0xc001e500||pc==0xffff0004) { //MRA instr */ - if (pc == 0xc001e500) { //MRA instr - mybeg5 = 1; - printf ("************SKYEYE: MRA instr now numinstr is %llu ********\n", state->NumInstrs); - } - if (pc >= 0xc0000000 && mybeg2 == 0) { - mybeg2 = 1; - printf ("************SKYEYE: enable mmu&cache, now numinstr is %llu **************\n", state->NumInstrs); - SKYEYE_OUTREGS (stderr); - printf ("************************************************************************\n"); - } - //chy 2003-09-01 test after tlb-flush - if (pc == 0xc00261ac) { - //sleep(2); - mybeg3 = 1; - printf ("************SKYEYE: after tlb-flush numinstr is %llu ****************\n", state->NumInstrs); - } - if (mybeg3 == 1) { - SKYEYE_OUTREGS (skyeye_logfd); - SKYEYE_OUTMOREREGS (skyeye_logfd); - fprintf (skyeye_logfd, "\n"); - } -#endif - if (mybegin == 1) { - //fprintf(skyeye_logfd,"p %x,i %x,d %x,l %x,",pc,instr,decoded,loaded); - //chy for test 20050729 - /*if (state->NumInstrs>=3302294) { - if (pc==0x100c9d4 && instr==0xe1b0f00e){ - chy_debug(); - printf("*********************************************\n"); - printf("******SKYEYE N %llx :p %x,i %x\n SKYEYE******\n",state->NumInstrs,pc,instr); - printf("*********************************************\n"); - } - */ - if (skyeye_config.log.logon >= 1) - /* - fprintf (skyeye_logfd, - "N %llx :p %x,i %x,", - state->NumInstrs, pc, - #ifdef MODET - TFLAG ? instr & 0xffff : instr - #else - instr - #endif - ); - */ - fprintf(skyeye_logfd, "pc=0x%x,r3=0x%x\n", pc, state->Reg[3]); - if (skyeye_config.log.logon >= 2) - SKYEYE_OUTREGS (skyeye_logfd); - if (skyeye_config.log.logon >= 3) - SKYEYE_OUTMOREREGS - (skyeye_logfd); - //fprintf (skyeye_logfd, "\n"); - if (skyeye_config.log.length > 0) { - myinstrnum++; - if (myinstrnum >= - skyeye_config.log. - length) { - myinstrnum = 0; - fflush (skyeye_logfd); - fseek (skyeye_logfd, - 0L, SEEK_SET); - } - } - } - //SKYEYE_OUTREGS(skyeye_logfd); - //SKYEYE_OUTMOREREGS(skyeye_logfd); - } - } -#endif -#if 0 /* Enable this for a helpful bit of debugging when tracing is needed. */ - fprintf (stderr, "pc: %x, instr: %x\n", pc & ~1, instr); - if (instr == 0) - abort (); -#endif -#if 0 /* Enable this code to help track down stack alignment bugs. */ - { - static ARMword old_sp = -1; - - if (old_sp != state->Reg[13]) { - old_sp = state->Reg[13]; - fprintf (stderr, - "pc: %08x: SP set to %08x%s\n", - pc & ~1, old_sp, - (old_sp % 8) ? " [UNALIGNED!]" : ""); - } - } -#endif /* Any exceptions ? */ if (state->NresetSig == LOW) { ARMul_Abort (state, ARMul_ResetV); - - /*added energy_prof statement by ksh in 2004-11-26 */ - //chy 2005-07-28 for standalone - //ARMul_do_energy(state,instr,pc); break; } else if (!state->NfiqSig && !FFLAG) { ARMul_Abort (state, ARMul_FIQV); - /*added energy_prof statement by ksh in 2004-11-26 */ - //chy 2005-07-28 for standalone - //ARMul_do_energy(state,instr,pc); break; } else if (!state->NirqSig && !IFLAG) { ARMul_Abort (state, ARMul_IRQV); - /*added energy_prof statement by ksh in 2004-11-26 */ - //chy 2005-07-28 for standalone - //ARMul_do_energy(state,instr,pc); break; } -//teawater add for arm2x86 2005.04.26------------------------------------------- -#if 0 -// if (state->pc == 0xc011a868 || state->pc == 0xc011a86c) { - if (state->NumInstrs == 1671574 || state->NumInstrs == 1671573 || state->NumInstrs == 1671572 - || state->NumInstrs == 1671575) { - for (reg_index = 0; reg_index < 16; reg_index ++) { - printf("R%d:%x\t", reg_index, state->Reg[reg_index]); - } - printf("\n"); - } -#endif - if (state->tea_pc) { - int i; - - if (state->tea_reg_fd) { - fprintf (state->tea_reg_fd, "\n"); - for (i = 0; i < 15; i++) { - fprintf (state->tea_reg_fd, "%x,", - state->Reg[i]); - } - fprintf (state->tea_reg_fd, "%x,", pc); - state->Cpsr = ARMul_GetCPSR (state); - fprintf (state->tea_reg_fd, "%x\n", - state->Cpsr); - } else { - printf ("\n"); - for (i = 0; i < 15; i++) { - printf ("%x,", state->Reg[i]); - } - printf ("%x,", pc); - state->Cpsr = ARMul_GetCPSR (state); - printf ("%x\n", state->Cpsr); - } - } -//AJ2D-------------------------------------------------------------------------- - - /*if (state->CallDebug > 0) { - instr = ARMul_Debug (state, pc, instr); - if (state->Emulate < ONCE) { - state->NextInstr = RESUME; - break; - } - if (state->Debug) { - fprintf (stderr, - "sim: At %08lx Instr %08lx Mode %02lx\n", - pc, instr, state->Mode); - (void) fgetc (stdin); - } - } - else*/ if (state->Emulate < ONCE) { state->NextInstr = RESUME; break; } - //io_do_cycle (state); + state->NumInstrs++; -#if 0 - if (state->NumInstrs % 10000000 == 0) { - printf("10 MIPS instr have been executed\n"); - } -#endif #ifdef MODET /* Provide Thumb instruction decoding. If the processor is in Thumb @@ -990,12 +514,6 @@ ARMul_Emulate26 (ARMul_State * state) /* clrex do nothing here temporary */ if (instr == 0xf57ff01f) { //printf("clrex \n"); -#if 0 - int i; - for(i = 0; i < 128; i++) { - state->exclusive_tag_array[i] = 0xffffffff; - } -#endif /* shenoubang 2012-3-14 refer the dyncom_interpreter */ state->exclusive_tag_array[0] = 0xFFFFFFFF; state->exclusive_access_state = 0; @@ -1169,9 +687,9 @@ mainswitch: Rn = BITS(0, 3); lsb = BITS(7, 11); msb = BITS(16, 20); //-V519 - if ((Rd == 15)) { + if (Rd == 15) { ARMul_UndefInstr (state, instr); - } else if ((Rn == 15)) { + } else if (Rn == 15) { data = state->Reg[Rd]; tmp_rd = ((ARMword)(data << (31 - lsb)) >> (31 - lsb)); dst = ((data >> msb) << (msb - lsb)); @@ -3209,16 +2727,6 @@ mainswitch: break; case 0x6e: /* Store Byte, WriteBack, Post Inc, Reg. */ -#if 0 - if (state->is_v6) { - int Rm = 0; - /* utxb */ - if (BITS(15, 19) == 0xf && BITS(4, 7) == 0x7) { - Rm = (RHS >> (8 * BITS(10, 11))) & 0xff; - DEST = Rm; - } - } -#endif if (BIT (4)) { #ifdef MODE32 if (state->is_v6 @@ -3656,13 +3164,6 @@ mainswitch: #endif state->Reg[15] = pc + 8 + POSBRANCH; FLUSHPIPE; - -#ifdef callstacker - memset(a, 0, 256); - aufloeser(a, state->Reg[15]); - printf("call %08X %08X %s(%08X %08X %08X %08X %08X %08X %08X)\n", state->Reg[14], state->Reg[15], a, state->Reg[0], state->Reg[1], state->Reg[2], state->Reg[3], mem_Read32(state->Reg[13]), mem_Read32(state->Reg[13] - 4),mem_Read32(state->Reg[13] - 8)); -#endif - break; /* Branch and Link backward. */ @@ -3682,13 +3183,6 @@ mainswitch: #endif state->Reg[15] = pc + 8 + NEGBRANCH; FLUSHPIPE; - -#ifdef callstacker - memset(a, 0, 256); - aufloeser(a, state->Reg[15]); - printf("call %08X %08X %s(%08X %08X %08X %08X %08X %08X %08X)\n", state->Reg[14], state->Reg[15], a, state->Reg[0], state->Reg[1], state->Reg[2], state->Reg[3], mem_Read32(state->Reg[13]), mem_Read32(state->Reg[13] - 4),mem_Read32(state->Reg[13] - 8)); -#endif - break; /* Co-Processor Data Transfers. */ @@ -3909,165 +3403,6 @@ mainswitch: donext: #endif state->pc = pc; -#if 0 - /* shenoubang */ - instr_sum++; - int i, j; - i = j = 0; - if (instr_sum >= 7388648) { - //if (pc == 0xc0008ab4) { - // printf("instr_sum: %d\n", instr_sum); - // start_kernel : 0xc000895c - printf("--------------------------------------------------\n"); - for (i = 0; i < 16; i++) { - printf("[R%02d]:[0x%08x]\t", i, state->Reg[i]); - if ((i % 3) == 2) { - printf("\n"); - } - } - printf("[cpr]:[0x%08x]\t[spr0]:[0x%08x]\n", state->Cpsr, state->Spsr[0]); - for (j = 1; j < 7; j++) { - printf("[spr%d]:[0x%08x]\t", j, state->Spsr[j]); - if ((j % 4) == 3) { - printf("\n"); - } - } - printf("\n[PC]:[0x%08x]\t[INST]:[0x%08x]\t[COUNT]:[%d]\n", pc, instr, instr_sum); - printf("--------------------------------------------------\n"); - } -#endif - -#if 0 - fprintf(state->state_log, "PC:0x%x\n", pc); - for (reg_index = 0; reg_index < 16; reg_index ++) { - if (state->Reg[reg_index] != mirror_register_file[reg_index]) { - fprintf(state->state_log, "R%d:0x%x\n", reg_index, state->Reg[reg_index]); - mirror_register_file[reg_index] = state->Reg[reg_index]; - } - } - if (state->Cpsr != mirror_register_file[CPSR_REG]) { - fprintf(state->state_log, "Cpsr:0x%x\n", state->Cpsr); - mirror_register_file[CPSR_REG] = state->Cpsr; - } - if (state->RegBank[SVCBANK][13] != mirror_register_file[R13_SVC]) { - fprintf(state->state_log, "R13_SVC:0x%x\n", state->RegBank[SVCBANK][13]); - mirror_register_file[R13_SVC] = state->RegBank[SVCBANK][13]; - } - if (state->RegBank[SVCBANK][14] != mirror_register_file[R14_SVC]) { - fprintf(state->state_log, "R14_SVC:0x%x\n", state->RegBank[SVCBANK][14]); - mirror_register_file[R14_SVC] = state->RegBank[SVCBANK][14]; - } - if (state->RegBank[ABORTBANK][13] != mirror_register_file[R13_ABORT]) { - fprintf(state->state_log, "R13_ABORT:0x%x\n", state->RegBank[ABORTBANK][13]); - mirror_register_file[R13_ABORT] = state->RegBank[ABORTBANK][13]; - } - if (state->RegBank[ABORTBANK][14] != mirror_register_file[R14_ABORT]) { - fprintf(state->state_log, "R14_ABORT:0x%x\n", state->RegBank[ABORTBANK][14]); - mirror_register_file[R14_ABORT] = state->RegBank[ABORTBANK][14]; - } - if (state->RegBank[UNDEFBANK][13] != mirror_register_file[R13_UNDEF]) { - fprintf(state->state_log, "R13_UNDEF:0x%x\n", state->RegBank[UNDEFBANK][13]); - mirror_register_file[R13_UNDEF] = state->RegBank[UNDEFBANK][13]; - } - if (state->RegBank[UNDEFBANK][14] != mirror_register_file[R14_UNDEF]) { - fprintf(state->state_log, "R14_UNDEF:0x%x\n", state->RegBank[UNDEFBANK][14]); - mirror_register_file[R14_UNDEF] = state->RegBank[UNDEFBANK][14]; - } - if (state->RegBank[IRQBANK][13] != mirror_register_file[R13_IRQ]) { - fprintf(state->state_log, "R13_IRQ:0x%x\n", state->RegBank[IRQBANK][13]); - mirror_register_file[R13_IRQ] = state->RegBank[IRQBANK][13]; - } - if (state->RegBank[IRQBANK][14] != mirror_register_file[R14_IRQ]) { - fprintf(state->state_log, "R14_IRQ:0x%x\n", state->RegBank[IRQBANK][14]); - mirror_register_file[R14_IRQ] = state->RegBank[IRQBANK][14]; - } - if (state->RegBank[FIQBANK][8] != mirror_register_file[R8_FIRQ]) { - fprintf(state->state_log, "R8_FIRQ:0x%x\n", state->RegBank[FIQBANK][8]); - mirror_register_file[R8_FIRQ] = state->RegBank[FIQBANK][8]; - } - if (state->RegBank[FIQBANK][9] != mirror_register_file[R9_FIRQ]) { - fprintf(state->state_log, "R9_FIRQ:0x%x\n", state->RegBank[FIQBANK][9]); - mirror_register_file[R9_FIRQ] = state->RegBank[FIQBANK][9]; - } - if (state->RegBank[FIQBANK][10] != mirror_register_file[R10_FIRQ]) { - fprintf(state->state_log, "R10_FIRQ:0x%x\n", state->RegBank[FIQBANK][10]); - mirror_register_file[R10_FIRQ] = state->RegBank[FIQBANK][10]; - } - if (state->RegBank[FIQBANK][11] != mirror_register_file[R11_FIRQ]) { - fprintf(state->state_log, "R11_FIRQ:0x%x\n", state->RegBank[FIQBANK][11]); - mirror_register_file[R11_FIRQ] = state->RegBank[FIQBANK][11]; - } - if (state->RegBank[FIQBANK][12] != mirror_register_file[R12_FIRQ]) { - fprintf(state->state_log, "R12_FIRQ:0x%x\n", state->RegBank[FIQBANK][12]); - mirror_register_file[R12_FIRQ] = state->RegBank[FIQBANK][12]; - } - if (state->RegBank[FIQBANK][13] != mirror_register_file[R13_FIRQ]) { - fprintf(state->state_log, "R13_FIRQ:0x%x\n", state->RegBank[FIQBANK][13]); - mirror_register_file[R13_FIRQ] = state->RegBank[FIQBANK][13]; - } - if (state->RegBank[FIQBANK][14] != mirror_register_file[R14_FIRQ]) { - fprintf(state->state_log, "R14_FIRQ:0x%x\n", state->RegBank[FIQBANK][14]); - mirror_register_file[R14_FIRQ] = state->RegBank[FIQBANK][14]; - } - if (state->Spsr[SVCBANK] != mirror_register_file[SPSR_SVC]) { - fprintf(state->state_log, "SPSR_SVC:0x%x\n", state->Spsr[SVCBANK]); - mirror_register_file[SPSR_SVC] = state->RegBank[SVCBANK]; - } - if (state->Spsr[ABORTBANK] != mirror_register_file[SPSR_ABORT]) { - fprintf(state->state_log, "SPSR_ABORT:0x%x\n", state->Spsr[ABORTBANK]); - mirror_register_file[SPSR_ABORT] = state->RegBank[ABORTBANK]; - } - if (state->Spsr[UNDEFBANK] != mirror_register_file[SPSR_UNDEF]) { - fprintf(state->state_log, "SPSR_UNDEF:0x%x\n", state->Spsr[UNDEFBANK]); - mirror_register_file[SPSR_UNDEF] = state->RegBank[UNDEFBANK]; - } - if (state->Spsr[IRQBANK] != mirror_register_file[SPSR_IRQ]) { - fprintf(state->state_log, "SPSR_IRQ:0x%x\n", state->Spsr[IRQBANK]); - mirror_register_file[SPSR_IRQ] = state->RegBank[IRQBANK]; - } - if (state->Spsr[FIQBANK] != mirror_register_file[SPSR_FIRQ]) { - fprintf(state->state_log, "SPSR_FIRQ:0x%x\n", state->Spsr[FIQBANK]); - mirror_register_file[SPSR_FIRQ] = state->RegBank[FIQBANK]; - } - -#endif - -#ifdef NEED_UI_LOOP_HOOK - if (ui_loop_hook != NULL && ui_loop_hook_counter-- < 0) { - ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL; - ui_loop_hook (0); - } -#endif /* NEED_UI_LOOP_HOOK */ - - /*added energy_prof statement by ksh in 2004-11-26 */ - //chy 2005-07-28 for standalone - //ARMul_do_energy(state,instr,pc); -//teawater add for record reg value to ./reg.txt 2005.07.10--------------------- - if (state->tea_break_ok && pc == state->tea_break_addr) { - //ARMul_Debug (state, 0, 0); - state->tea_break_ok = 0; - } else { - state->tea_break_ok = 1; - } -//AJ2D-------------------------------------------------------------------------- -//chy 2006-04-14 for ctrl-c debug -#if 0 - if (debugmode) { - if (instr != ARMul_ABORTWORD) { - remote_interrupt_test_time++; - //chy 2006-04-14 2000 should be changed in skyeye_conf ???!!! - if (remote_interrupt_test_time >= 2000) { - remote_interrupt_test_time=0; - if (remote_interrupt()) { - //for test - //printf("SKYEYE: ICE_debug recv Ctrl_C\n"); - state->EndCondition = 0; - state->Emulate = STOP; - } - } - } - } -#endif /* jump out every time */ //state->EndCondition = 0; @@ -4076,10 +3411,6 @@ donext: TEST_EMULATE: if (state->Emulate == ONCE) state->Emulate = STOP; - //chy: 2003-08-23: should not use CHANGEMODE !!!! - /* If we have changed mode, allow the PC to advance before stopping. */ - // else if (state->Emulate == CHANGEMODE) - // continue; else if (state->Emulate != RUN) break; } @@ -4096,225 +3427,14 @@ exit: return pc; } -//teawater add for arm2x86 2005.02.17------------------------------------------- - /*ywc 2005-04-01*/ -//#include "tb.h" -//#include "arm2x86_self.h" - static volatile void (*gen_func) (void); -//static volatile ARMul_State *tmp_st; -//static volatile ARMul_State *save_st; + static volatile uint32_t tmp_st; static volatile uint32_t save_st; static volatile uint32_t save_T0; static volatile uint32_t save_T1; static volatile uint32_t save_T2; -#ifdef MODE32 -#ifdef DBCT -//teawater change for debug function 2005.07.09--------------------------------- - ARMword - ARMul_Emulate32_dbct (ARMul_State * state) { - static int init = 0; - static FILE *fd; - - /*if (!init) { - fd = fopen("./pc.txt", "w"); - if (!fd) { - exit(-1); - } - init = 1; - } */ - - state->Reg[15] += INSN_SIZE; - do { - /*if (skyeye_config.log.logon>=1) { - if (state->NumInstrs>=skyeye_config.log.start && state->NumInstrs<=skyeye_config.log.end) { - static int mybegin=0; - static int myinstrnum=0; - - if (mybegin==0) mybegin=1; - if (mybegin==1) { - state->Reg[15] -= INSN_SIZE; - if (skyeye_config.log.logon>=1) fprintf(skyeye_logfd,"N %llx :p %x,i %x,",state->NumInstrs, (state->Reg[15] - INSN_SIZE), instr); - if (skyeye_config.log.logon>=2) SKYEYE_OUTREGS(skyeye_logfd); - if (skyeye_config.log.logon>=3) SKYEYE_OUTMOREREGS(skyeye_logfd); - fprintf(skyeye_logfd,"\n"); - if (skyeye_config.log.length>0) { - myinstrnum++; - if (myinstrnum>=skyeye_config.log.length) { - myinstrnum=0; - fflush(skyeye_logfd); - fseek(skyeye_logfd,0L,SEEK_SET); - } - } - state->Reg[15] += INSN_SIZE; - } - } - } */ - state->trap = 0; - gen_func = - (void *) tb_find (state, state->Reg[15] - INSN_SIZE); - if (!gen_func) { - //fprintf(stderr, "SKYEYE: tb_find: Error in find the translate block.\n"); - //exit(-1); - //TRAP_INSN_ABORT - //TEA_OUT(printf("\n------------\npc:%x\n", state->Reg[15] - INSN_SIZE)); - //TEA_OUT(printf("TRAP_INSN_ABORT\n")); -//teawater add for xscale(arm v5) 2005.09.01------------------------------------ - /*XScale_set_fsr_far(state, ARMul_CP15_R5_MMU_EXCPT, state->Reg[15] - INSN_SIZE); - state->Reg[15] += INSN_SIZE; - ARMul_Abort(state, ARMul_PrefetchAbortV); - state->Reg[15] += INSN_SIZE; - goto next; */ - state->trap = TRAP_INSN_ABORT; - goto check; -//AJ2D-------------------------------------------------------------------------- - } - - save_st = (uint32_t) st; - save_T0 = T0; - save_T1 = T1; - save_T2 = T2; - tmp_st = (uint32_t) state; - wmb (); - st = (ARMul_State *) tmp_st; - gen_func (); - st = (ARMul_State *) save_st; - T0 = save_T0; - T1 = save_T1; - T2 = save_T2; - - /*if (state->trap != TRAP_OUT) { - state->tea_break_ok = 1; - } - if (state->trap <= TRAP_SET_R15) { - goto next; - } */ - //TEA_OUT(printf("\n------------\npc:%x\n", state->Reg[15] - INSN_SIZE)); -//teawater add check thumb 2005.07.21------------------------------------------- - /*if (TFLAG) { - state->Reg[15] -= 2; - return(state->Reg[15]); - } */ -//AJ2D-------------------------------------------------------------------------- - -//teawater add for xscale(arm v5) 2005.09.01------------------------------------ -check: -//AJ2D-------------------------------------------------------------------------- - switch (state->trap) { - case TRAP_RESET: { - //TEA_OUT(printf("TRAP_RESET\n")); - ARMul_Abort (state, ARMul_ResetV); - state->Reg[15] += INSN_SIZE; - } - break; - case TRAP_UNPREDICTABLE: { - //ARMul_Debug (state, 0, 0); - } - break; - case TRAP_INSN_UNDEF: { - //TEA_OUT(printf("TRAP_INSN_UNDEF\n")); - state->Reg[15] += INSN_SIZE; - ARMul_UndefInstr (state, 0); - state->Reg[15] += INSN_SIZE; - } - break; - case TRAP_SWI: { - //TEA_OUT(printf("TRAP_SWI\n")); - state->Reg[15] += INSN_SIZE; - ARMul_Abort (state, ARMul_SWIV); - state->Reg[15] += INSN_SIZE; - } - break; -//teawater add for xscale(arm v5) 2005.09.01------------------------------------ - case TRAP_INSN_ABORT: { - /*XScale_set_fsr_far (state, - ARMul_CP15_R5_MMU_EXCPT, - state->Reg[15] - - INSN_SIZE);*/ - state->Reg[15] += INSN_SIZE; - ARMul_Abort (state, ARMul_PrefetchAbortV); - state->Reg[15] += INSN_SIZE; - } - break; -//AJ2D-------------------------------------------------------------------------- - case TRAP_DATA_ABORT: { - //TEA_OUT(printf("TRAP_DATA_ABORT\n")); - state->Reg[15] += INSN_SIZE; - ARMul_Abort (state, ARMul_DataAbortV); - state->Reg[15] += INSN_SIZE; - } - break; - case TRAP_IRQ: { - //TEA_OUT(printf("TRAP_IRQ\n")); - state->Reg[15] += INSN_SIZE; - ARMul_Abort (state, ARMul_IRQV); - state->Reg[15] += INSN_SIZE; - } - break; - case TRAP_FIQ: { - //TEA_OUT(printf("TRAP_FIQ\n")); - state->Reg[15] += INSN_SIZE; - ARMul_Abort (state, ARMul_FIQV); - state->Reg[15] += INSN_SIZE; - } - break; - case TRAP_SETS_R15: { - //TEA_OUT(printf("TRAP_SETS_R15\n")); - /*if (state->Bank > 0) { - state->Cpsr = state->Spsr[state->Bank]; - ARMul_CPSRAltered (state); - } */ - WriteSR15 (state, state->Reg[15]); - } - break; - case TRAP_SET_CPSR: { - //TEA_OUT(printf("TRAP_SET_CPSR\n")); - //chy 2006-02-15 USERBANK=SYSTEMBANK=0 - //chy 2006-02-16 should use Mode to test - //if (state->Bank > 0) { - if (state->Mode != USER26MODE && state->Mode != USER32MODE) { - //ARMul_CPSRAltered (state); - } - state->Reg[15] += INSN_SIZE; - } - break; - case TRAP_OUT: { - //TEA_OUT(printf("TRAP_OUT\n")); - goto out; - } - break; - case TRAP_BREAKPOINT: { - //TEA_OUT(printf("TRAP_BREAKPOINT\n")); - state->Reg[15] -= INSN_SIZE; - if (!ARMul_OSHandleSWI - (state, SWI_Breakpoint)) { - ARMul_Abort (state, ARMul_SWIV); - } - state->Reg[15] += INSN_SIZE; - } - break; - } - -next: - if (state->Emulate == ONCE) { - state->Emulate = STOP; - break; - } else if (state->Emulate != RUN) { - break; - } - } while (!state->stop_simulator); - -out: - state->Reg[15] -= INSN_SIZE; - return (state->Reg[15]); - } -#endif -//AJ2D-------------------------------------------------------------------------- -#endif -//AJ2D-------------------------------------------------------------------------- - /* This routine evaluates most Data Processing register RHS's with the S bit clear. It is intended to be called from the macro DPRegRHS, which filters the common case of an unshifted register with in line code. */ @@ -4672,21 +3792,6 @@ out: return BITS (0, 3) | (BITS (8, 11) << 4); } - /* This function does the work of loading a word for a LDR instruction. */ -#define MEM_LOAD_LOG(description) if (skyeye_config.log.memlogon >= 1) { \ - fprintf(skyeye_logfd, \ - "m LOAD %s: N %llx :p %x :i %x :a %x :d %x\n", \ - description, state->NumInstrs, state->pc, instr, \ - address, dest); \ - } - -#define MEM_STORE_LOG(description) if (skyeye_config.log.memlogon >= 1) { \ - fprintf(skyeye_logfd, \ - "m STORE %s: N %llx :p %x :i %x :a %x :d %x\n", \ - description, state->NumInstrs, state->pc, instr, \ - address, DEST); \ - } - static unsigned LoadWord (ARMul_State * state, ARMword instr, ARMword address) { ARMword dest; @@ -4708,8 +3813,6 @@ out: WRITEDESTB (dest); ARMul_Icycles (state, 1, 0L); - //MEM_LOAD_LOG("WORD"); - return (DESTReg != LHSReg); } @@ -4739,8 +3842,6 @@ out: WRITEDEST (dest); ARMul_Icycles (state, 1, 0L); - //MEM_LOAD_LOG("HALFWORD"); - return (DESTReg != LHSReg); } @@ -4770,8 +3871,6 @@ out: WRITEDEST (dest); ARMul_Icycles (state, 1, 0L); - //MEM_LOAD_LOG("BYTE"); - return (DESTReg != LHSReg); } @@ -4980,8 +4079,6 @@ out: static unsigned StoreWord (ARMul_State * state, ARMword instr, ARMword address) { - //MEM_STORE_LOG("WORD"); - BUSUSEDINCPCN; #ifndef MODE32 if (DESTReg == 15) @@ -5009,8 +4106,6 @@ out: static unsigned StoreHalfWord (ARMul_State * state, ARMword instr, ARMword address) { - //MEM_STORE_LOG("HALFWORD"); - BUSUSEDINCPCN; #ifndef MODE32 @@ -5041,8 +4136,6 @@ out: static unsigned StoreByte (ARMul_State * state, ARMword instr, ARMword address) { - //MEM_STORE_LOG("BYTE"); - BUSUSEDINCPCN; #ifndef MODE32 if (DESTReg == 15) diff --git a/src/core/arm/interpreter/arminit.cpp b/src/core/arm/interpreter/arminit.cpp index 03bca2870..8ab5ef160 100644 --- a/src/core/arm/interpreter/arminit.cpp +++ b/src/core/arm/interpreter/arminit.cpp @@ -15,8 +15,6 @@ along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -//#include <unistd.h> - #include "core/arm/skyeye_common/armdefs.h" #include "core/arm/skyeye_common/armemu.h" @@ -24,26 +22,21 @@ * Definitions for the emulator architecture * \***************************************************************************/ -void ARMul_EmulateInit (void); -ARMul_State *ARMul_NewState (ARMul_State * state); -void ARMul_Reset (ARMul_State * state); -ARMword ARMul_DoCycle (ARMul_State * state); -unsigned ARMul_DoCoPro (ARMul_State * state); -ARMword ARMul_DoProg (ARMul_State * state); -ARMword ARMul_DoInstr (ARMul_State * state); -void ARMul_Abort (ARMul_State * state, ARMword address); +void ARMul_EmulateInit(); +ARMul_State* ARMul_NewState(ARMul_State* state); +void ARMul_Reset (ARMul_State* state); +ARMword ARMul_DoCycle(ARMul_State* state); +unsigned ARMul_DoCoPro(ARMul_State* state); +ARMword ARMul_DoProg(ARMul_State* state); +ARMword ARMul_DoInstr(ARMul_State* state); +void ARMul_Abort(ARMul_State* state, ARMword address); unsigned ARMul_MultTable[32] = { 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16 }; -ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */ -char ARMul_BitList[256]; /* number of bits in a byte table */ - -//chy 2006-02-22 add test debugmode -extern int debugmode; -extern int remote_interrupt( void ); - +ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */ +char ARMul_BitList[256]; /* number of bits in a byte table */ void arm_dyncom_Abort(ARMul_State * state, ARMword vector) { @@ -51,36 +44,10 @@ void arm_dyncom_Abort(ARMul_State * state, ARMword vector) } -/* ahe-ykl : the following code to initialize user mode - code is architecture dependent and probably model dependant. */ - -/*#include "skyeye_arch.h" -#include "skyeye_pref.h" -#include "skyeye_exec_info.h" -#include "bank_defs.h"*/ -//#include "armcpu.h" -//#include "skyeye_callback.h" - -/* - ARM_CPU_State* cpu = get_current_cpu(); - arm_core_t* core = &cpu->core[0]; - - uint32_t sp = info->initial_sp; - - core->Cpsr = 0x10; // User mode -// FIXME: may need to add thumb -core->Reg[13] = sp; -core->Reg[10] = info->start_data; -core->Reg[0] = 0; -bus_read(32, sp + 4, &(core->Reg[1])); -bus_read(32, sp + 8, &(core->Reg[2])); -*/ /***************************************************************************\ * Call this routine once to set up the emulator's tables. * \***************************************************************************/ - -void -ARMul_EmulateInit (void) +void ARMul_EmulateInit() { unsigned int i, j; @@ -102,9 +69,7 @@ ARMul_EmulateInit (void) /***************************************************************************\ * Returns a new instantiation of the ARMulator's state * \***************************************************************************/ - -ARMul_State * -ARMul_NewState (ARMul_State *state) +ARMul_State* ARMul_NewState(ARMul_State* state) { unsigned i, j; @@ -120,7 +85,6 @@ ARMul_NewState (ARMul_State *state) state->Spsr[i] = 0; state->Mode = 0; - state->CallDebug = FALSE; state->Debug = FALSE; state->VectorCatch = 0; state->Aborted = FALSE; @@ -128,34 +92,6 @@ ARMul_NewState (ARMul_State *state) state->Inted = 3; state->LastInted = 3; - state->CommandLine = NULL; - - state->EventSet = 0; - state->Now = 0; - state->EventPtr = - (struct EventNode **) malloc ((unsigned) EVENTLISTSIZE * - sizeof (struct EventNode *)); -#if DIFF_STATE - state->state_log = fopen("/data/state.log", "w"); - printf("create pc log file.\n"); -#endif - if (state->EventPtr == NULL) { - printf ("SKYEYE: ARMul_NewState malloc state->EventPtr error\n"); - exit(-1); - //skyeye_exit (-1); - } - for (i = 0; i < EVENTLISTSIZE; i++) - *(state->EventPtr + i) = NULL; -#if SAVE_LOG - state->state_log = fopen("/tmp/state.log", "w"); - printf("create pc log file.\n"); -#else -#if DIFF_LOG - state->state_log = fopen("/tmp/state.log", "r"); - printf("loaded pc log file.\n"); -#endif -#endif - #ifdef ARM61 state->prog32Sig = LOW; state->data32Sig = LOW; @@ -168,28 +104,19 @@ ARMul_NewState (ARMul_State *state) state->bigendSig = LOW; //chy:2003-08-19 - state->LastTime = 0; state->CP14R0_CCD = -1; - /* ahe-ykl: common function for interpret and dyncom */ - /*sky_pref_t *pref = get_skyeye_pref(); - if (pref->user_mode_sim) - register_callback(arm_user_mode_init, Bootmach_callback); - */ - memset(&state->exclusive_tag_array[0], 0xFF, sizeof(state->exclusive_tag_array[0]) * 128); state->exclusive_access_state = 0; - //state->cpu = (cpu_config_t *) malloc (sizeof (cpu_config_t)); - //state->mem_bank = (mem_config_t *) malloc (sizeof (mem_config_t)); - return (state); + + return state; } /***************************************************************************\ * Call this routine to set ARMulator to model a certain processor * \***************************************************************************/ -void -ARMul_SelectProcessor (ARMul_State * state, unsigned properties) +void ARMul_SelectProcessor(ARMul_State* state, unsigned properties) { if (properties & ARM_Fix26_Prop) { state->prog32Sig = LOW; @@ -198,27 +125,16 @@ ARMul_SelectProcessor (ARMul_State * state, unsigned properties) state->prog32Sig = HIGH; state->data32Sig = HIGH; } - /* 2004-05-09 chy - below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function - */ - // state->lateabtSig = HIGH; - - state->is_v4 = - (properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW; - state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW; - state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW; + state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW; + state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW; + state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW; state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW; state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) ? HIGH : LOW; - /* state->is_v6 = LOW */; - /* jeff.du 2010-08-05 */ - state->is_v6 = (properties & ARM_v6_Prop) ? HIGH : LOW; + state->is_v6 = (properties & ARM_v6_Prop) ? HIGH : LOW; state->is_ep9312 = (properties & ARM_ep9312_Prop) ? HIGH : LOW; - //chy 2005-09-19 state->is_pxa27x = (properties & ARM_PXA27X_Prop) ? HIGH : LOW; - - /* shenoubang 2012-3-11 */ - state->is_v7 = (properties & ARM_v7_Prop) ? HIGH : LOW; + state->is_v7 = (properties & ARM_v7_Prop) ? HIGH : LOW; /* Only initialse the coprocessor support once we know what kind of chip we are dealing with. */ @@ -229,11 +145,8 @@ ARMul_SelectProcessor (ARMul_State * state, unsigned properties) /***************************************************************************\ * Call this routine to set up the initial machine state (or perform a RESET * \***************************************************************************/ - -void -ARMul_Reset (ARMul_State * state) +void ARMul_Reset(ARMul_State* state) { - //fprintf(stderr,"armul_reset 0: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); state->NextInstr = 0; if (state->prog32Sig) { state->Reg[15] = 0; @@ -244,15 +157,13 @@ ARMul_Reset (ARMul_State * state) state->Cpsr = INTBITS | SVC26MODE; state->Mode = SVC26MODE; } - //fprintf(stderr,"armul_reset 1: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); - //ARMul_CPSRAltered (state); + state->Bank = SVCBANK; FLUSHPIPE; state->EndCondition = 0; state->ErrorCode = 0; - //fprintf(stderr,"armul_reset 2: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); state->NresetSig = HIGH; state->NfiqSig = HIGH; state->NirqSig = HIGH; @@ -266,33 +177,6 @@ ARMul_Reset (ARMul_State * state) state->NumIcycles = 0; state->NumCcycles = 0; state->NumFcycles = 0; - - //fprintf(stderr,"armul_reset 3: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); - //mmu_reset (state); - //fprintf(stderr,"armul_reset 4: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); - - //mem_reset (state); /* move to memory/ram.c */ - - //fprintf(stderr,"armul_reset 5: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); - /*remove later. walimis 03.7.17 */ - //io_reset(state); - //lcd_disable(state); - - /*ywc 2005-04-07 move from ARMul_NewState , because skyeye_config.no_dbct will - *be configured in skyeye_option_init and it is called after ARMul_NewState*/ - state->tea_break_ok = 0; - state->tea_break_addr = 0; - state->tea_pc = 0; -#ifdef DBCT - if (!skyeye_config.no_dbct) { - //teawater add for arm2x86 2005.02.14------------------------------------------- - if (arm2x86_init (state)) { - printf ("SKYEYE: arm2x86_init error\n"); - //skyeye_exit (-1); - } - //AJ2D-------------------------------------------------------------------------- - } -#endif } @@ -301,108 +185,23 @@ ARMul_Reset (ARMul_State * state) * (Emulate26 for a 26 bit ARM and Emulate32 for a 32 bit ARM), return the * * address of the last instruction that is executed. * \***************************************************************************/ - -//teawater add DBCT_TEST_SPEED 2005.10.04--------------------------------------- -#ifdef DBCT_TEST_SPEED -static ARMul_State *dbct_test_speed_state = NULL; -static void -dbct_test_speed_sig(int signo) -{ - printf("\n0x%llx %llu\n", dbct_test_speed_state->instr_count, dbct_test_speed_state->instr_count); - exit(0); - //skyeye_exit(0); -} -#endif //DBCT_TEST_SPEED -//AJ2D-------------------------------------------------------------------------- - -ARMword -ARMul_DoProg (ARMul_State * state) +ARMword ARMul_DoProg(ARMul_State* state) { ARMword pc = 0; - /* - * 2007-01-24 removed the term-io functions by Anthony Lee, - * moved to "device/uart/skyeye_uart_stdio.c". - */ - -//teawater add DBCT_TEST_SPEED 2005.10.04--------------------------------------- -#ifdef DBCT_TEST_SPEED - { - if (!dbct_test_speed_state) { - //init timer - struct itimerval value; - struct sigaction act; - - dbct_test_speed_state = state; - state->instr_count = 0; - act.sa_handler = dbct_test_speed_sig; - act.sa_flags = SA_RESTART; - //cygwin don't support ITIMER_VIRTUAL or ITIMER_PROF -#ifndef __CYGWIN__ - if (sigaction(SIGVTALRM, &act, NULL) == -1) { -#else - if (sigaction(SIGALRM, &act, NULL) == -1) { -#endif //__CYGWIN__ - fprintf(stderr, "init timer error.\n"); - exit(-1); - //skyeye_exit(-1); - } - if (skyeye_config.dbct_test_speed_sec) { - value.it_value.tv_sec = skyeye_config.dbct_test_speed_sec; - } else { - value.it_value.tv_sec = DBCT_TEST_SPEED_SEC; - } - printf("dbct_test_speed_sec = %ld\n", value.it_value.tv_sec); - value.it_value.tv_usec = 0; - value.it_interval.tv_sec = 0; - value.it_interval.tv_usec = 0; -#ifndef __CYGWIN__ - if (setitimer(ITIMER_VIRTUAL, &value, NULL) == -1) { -#else - if (setitimer(ITIMER_REAL, &value, NULL) == -1) { -#endif //__CYGWIN__ - fprintf(stderr, "init timer error.\n"); - //skyeye_exit(-1); - } - } - } -#endif //DBCT_TEST_SPEED -//AJ2D-------------------------------------------------------------------------- state->Emulate = RUN; while (state->Emulate != STOP) { state->Emulate = RUN; - /*ywc 2005-03-31 */ if (state->prog32Sig && ARMul_MODE32BIT) { -#ifdef DBCT - if (skyeye_config.no_dbct) { - pc = ARMul_Emulate32 (state); - } else { - pc = ARMul_Emulate32_dbct (state); - } -#else pc = ARMul_Emulate32 (state); -#endif } - else { //pc = ARMul_Emulate26 (state); } - //chy 2006-02-22, should test debugmode first - //chy 2006-04-14, put below codes in ARMul_Emulate -#if 0 - if(debugmode) - if(remote_interrupt()) - state->Emulate = STOP; -#endif } - /* - * 2007-01-24 removed the term-io functions by Anthony Lee, - * moved to "device/uart/skyeye_uart_stdio.c". - */ - - return (pc); + return pc; } /***************************************************************************\ @@ -410,38 +209,17 @@ ARMul_DoProg (ARMul_State * state) * (Emulate26 for a 26 bit ARM and Emulate32 for a 32 bit ARM), return the * * address of the instruction that is executed. * \***************************************************************************/ - -ARMword -ARMul_DoInstr (ARMul_State * state) +ARMword ARMul_DoInstr(ARMul_State* state) { ARMword pc = 0; state->Emulate = ONCE; - /*ywc 2005-03-31 */ if (state->prog32Sig && ARMul_MODE32BIT) { -#ifdef DBCT - if (skyeye_config.no_dbct) { - pc = ARMul_Emulate32 (state); - } else { -//teawater add compile switch for DBCT GDB RSP function 2005.10.21-------------- -#ifndef DBCT_GDBRSP - printf("DBCT GDBRSP function switch is off.\n"); - printf("To use this function, open \"#define DBCT_GDBRSP\" in arch/arm/common/armdefs.h & recompile skyeye.\n"); - skyeye_exit(-1); -#endif //DBCT_GDBRSP -//AJ2D-------------------------------------------------------------------------- - pc = ARMul_Emulate32_dbct (state); - } -#else pc = ARMul_Emulate32 (state); -#endif } - //else - //pc = ARMul_Emulate26 (state); - - return (pc); + return pc; } /***************************************************************************\ @@ -449,9 +227,7 @@ ARMul_DoInstr (ARMul_State * state) * mode, register bank, and the saving of registers. Call with the * * appropriate vector's memory address (0,4,8 ....) * \***************************************************************************/ - -void -ARMul_Abort (ARMul_State * state, ARMword vector) +void ARMul_Abort(ARMul_State* state, ARMword vector) { ARMword temp; int isize = INSN_SIZE; @@ -494,21 +270,11 @@ ARMul_Abort (ARMul_State * state, ARMword vector) SETABORT (IBIT, SVC26MODE, isize); break; case ARMul_IRQV: /* IRQ */ - //chy 2003-09-02 the if sentence seems no use -#if 0 - if (!state->is_XScale || !state->CPRead[13] (state, 0, &temp) - || (temp & ARMul_CP13_R0_IRQ)) -#endif SETABORT (IBIT, state->prog32Sig ? IRQ32MODE : IRQ26MODE, esize); break; case ARMul_FIQV: /* FIQ */ - //chy 2003-09-02 the if sentence seems no use -#if 0 - if (!state->is_XScale || !state->CPRead[13] (state, 0, &temp) - || (temp & ARMul_CP13_R0_FIQ)) -#endif SETABORT (INTBITS, state->prog32Sig ? FIQ32MODE : FIQ26MODE, esize); diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index e2626eefb..5a8f09b22 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -22,13 +22,6 @@ static ARMword ModeToBank (ARMword); -static void EnvokeList (ARMul_State *, unsigned int, unsigned int); - -struct EventNode { - /* An event list node. */ - unsigned (*func) (ARMul_State *); /* The function to call. */ - struct EventNode *next; -}; /* This routine returns the value of a register from a mode. */ @@ -1068,76 +1061,3 @@ ARMul_Align (ARMul_State* state, ARMword address, ARMword data) address = (address & 3) << 3; /* Get the word address. */ return ((data >> address) | (data << (32 - address))); /* rot right */ } - -/* This routine is used to call another routine after a certain number of - cycles have been executed. The first parameter is the number of cycles - delay before the function is called, the second argument is a pointer - to the function. A delay of zero doesn't work, just call the function. */ - -void -ARMul_ScheduleEvent (ARMul_State * state, unsigned int delay, - unsigned (*what) (ARMul_State *)) -{ - unsigned int when; - struct EventNode *event; - - if (state->EventSet++ == 0) - state->Now = ARMul_Time (state); - when = (state->Now + delay) % EVENTLISTSIZE; - event = (struct EventNode *) malloc (sizeof (struct EventNode)); - if (!event) { - printf ("SKYEYE:ARMul_ScheduleEvent: malloc event error\n"); - exit(-1); - //skyeye_exit (-1); - } - event->func = what; - event->next = *(state->EventPtr + when); - *(state->EventPtr + when) = event; -} - -/* This routine is called at the beginning of - every cycle, to envoke scheduled events. */ - -void -ARMul_EnvokeEvent (ARMul_State * state) -{ - static unsigned int then; - - then = state->Now; - state->Now = ARMul_Time (state) % EVENTLISTSIZE; - if (then < state->Now) - /* Schedule events. */ - EnvokeList (state, then, state->Now); - else if (then > state->Now) { - /* Need to wrap around the list. */ - EnvokeList (state, then, EVENTLISTSIZE - 1L); - EnvokeList (state, 0L, state->Now); - } -} - -/* Envokes all the entries in a range. */ - -static void -EnvokeList (ARMul_State * state, unsigned int from, unsigned int to) -{ - for (; from <= to; from++) { - struct EventNode *anevent; - - anevent = *(state->EventPtr + from); - while (anevent) { - (anevent->func) (state); - state->EventSet--; - anevent = anevent->next; - } - *(state->EventPtr + from) = NULL; - } -} - -/* This routine is returns the number of clock ticks since the last reset. */ - -unsigned int -ARMul_Time (ARMul_State * state) -{ - return (state->NumScycles + state->NumNcycles + - state->NumIcycles + state->NumCcycles + state->NumFcycles); -} diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index 560b51a9f..a9c41ce5a 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -15,8 +15,7 @@ along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#ifndef _ARMDEFS_H_ -#define _ARMDEFS_H_ +#pragma once #include <cerrno> #include <csignal> @@ -33,21 +32,6 @@ #include "core/arm/skyeye_common/armmmu.h" #include "core/arm/skyeye_common/skyeye_defs.h" -#if EMU_PLATFORM == PLATFORM_LINUX -#include <sys/time.h> -#include <unistd.h> -#endif - -#if 0 -#if 0 -#define DIFF_STATE 1 -#define __FOLLOW_MODE__ 0 -#else -#define DIFF_STATE 0 -#define __FOLLOW_MODE__ 1 -#endif -#endif - #ifndef FALSE #define FALSE 0 #define TRUE 1 @@ -58,13 +42,6 @@ #define LOWHIGH 1 #define HIGHLOW 2 -//#define DBCT_TEST_SPEED -#define DBCT_TEST_SPEED_SEC 10 - -#define ARM_BYTE_TYPE 0 -#define ARM_HALFWORD_TYPE 1 -#define ARM_WORD_TYPE 2 - //the define of cachetype #define NONCACHE 0 #define DATACACHE 1 @@ -73,18 +50,11 @@ #define POS(i) ( (~(i)) >> 31 ) #define NEG(i) ( (i) >> 31 ) -#ifndef __STDC__ -typedef char *VoidStar; -#endif - typedef u64 ARMdword; // must be 64 bits wide typedef u32 ARMword; // must be 32 bits wide typedef u16 ARMhword; // must be 16 bits wide typedef u8 ARMbyte; // must be 8 bits wide typedef struct ARMul_State ARMul_State; -typedef struct ARMul_io ARMul_io; -typedef struct ARMul_Energy ARMul_Energy; - typedef unsigned ARMul_CPInits(ARMul_State* state); typedef unsigned ARMul_CPExits(ARMul_State* state); @@ -98,65 +68,6 @@ typedef unsigned ARMul_CDPs(ARMul_State* state, unsigned type, ARMword instr); typedef unsigned ARMul_CPReads(ARMul_State* state, unsigned reg, ARMword* value); typedef unsigned ARMul_CPWrites(ARMul_State* state, unsigned reg, ARMword value); - -//added by ksh,2004-3-5 -struct ARMul_io -{ - ARMword *instr; // to display the current interrupt state - ARMword *net_flag; // to judge if network is enabled - ARMword *net_int; // netcard interrupt - - //ywc,2004-04-01 - ARMword *ts_int; - ARMword *ts_is_enable; - ARMword *ts_addr_begin; - ARMword *ts_addr_end; - ARMword *ts_buffer; -}; - -/* added by ksh,2004-11-26,some energy profiling */ -struct ARMul_Energy -{ - int energy_prof; /* <tktan> BUG200103282109 : for energy profiling */ - int enable_func_energy; /* <tktan> BUG200105181702 */ - char *func_energy; - int func_display; /* <tktan> BUG200103311509 : for function call display */ - int func_disp_start; /* <tktan> BUG200104191428 : to start func profiling */ - char *start_func; /* <tktan> BUG200104191428 */ - - FILE *outfile; /* <tktan> BUG200105201531 : direct console to file */ - long long tcycle, pcycle; - float t_energy; - void *cur_task; /* <tktan> BUG200103291737 */ - long long t_mem_cycle, t_idle_cycle, t_uart_cycle; - long long p_mem_cycle, p_idle_cycle, p_uart_cycle; - long long p_io_update_tcycle; - /*record CCCR,to get current core frequency */ - ARMword cccr; -}; -#if 0 -#define MAX_BANK 8 -#define MAX_STR 1024 - -typedef struct mem_bank -{ - ARMword (*read_byte) (ARMul_State* state, ARMword addr); - void (*write_byte) (ARMul_State* state, ARMword addr, ARMword data); - ARMword (*read_halfword) (ARMul_State* state, ARMword addr); - void (*write_halfword) (ARMul_State* state, ARMword addr, ARMword data); - ARMword (*read_word) (ARMul_State* state, ARMword addr); - void (*write_word) (ARMul_State* state, ARMword addr, ARMword data); - unsigned int addr, len; - char filename[MAX_STR]; - unsigned type; //chy 2003-09-21: maybe io,ram,rom -} mem_bank_t; -typedef struct -{ - int bank_num; - int current_num; /*current num of bank */ - mem_bank_t mem_banks[MAX_BANK]; -} mem_config_t; -#endif #define VFP_REG_NUM 64 struct ARMul_State { @@ -196,9 +107,8 @@ struct ARMul_State ARMdword Accumulator; ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; /* dummy flags for speed */ - unsigned long long int icounter, debug_icounter, kernel_icounter; - unsigned int shifter_carry_out; - //ARMword translate_pc; + unsigned long long int icounter, debug_icounter, kernel_icounter; + unsigned int shifter_carry_out; /* add armv6 flags dyf:2010-08-09 */ ARMword GEFlag, EFlag, AFlag, QFlag; @@ -226,9 +136,6 @@ struct ARMul_State unsigned CanWatch; /* set by memory interface if its willing to suffer the overhead of checking for watchpoints on each memory access */ - unsigned int StopHandle; - - char *CommandLine; /* Command Line from ARMsd */ ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */ ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */ @@ -244,10 +151,6 @@ struct ARMul_State unsigned char *CPData[16]; /* Coprocessor data */ unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */ - unsigned EventSet; /* the number of events in the queue */ - unsigned int Now; /* time to the nearest cycle */ - struct EventNode **EventPtr; /* the event list */ - unsigned Debug; /* show instructions as they are executed */ unsigned NresetSig; /* reset the processor */ unsigned NfiqSig; @@ -300,17 +203,9 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) ARMword Base; /* extra hand for base writeback */ ARMword AbortAddr; /* to keep track of Prefetch aborts */ - const struct Dbg_HostosInterface *hostif; - int verbose; /* non-zero means print various messages like the banner */ int mmu_inited; - //mem_state_t mem; - /*remove io_state to skyeye_mach_*.c files */ - //io_state_t io; - /* point to a interrupt pending register. now for skyeye-ne2k.c - * later should move somewhere. e.g machine_config_t*/ - //chy: 2003-08-11, for different arm core type unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */ @@ -321,44 +216,17 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) unsigned is_XScale; /* Are we emulating an XScale architecture ? */ unsigned is_iWMMXt; /* Are we emulating an iWMMXt co-processor ? */ unsigned is_ep9312; /* Are we emulating a Cirrus Maverick co-processor ? */ - //chy 2005-09-19 unsigned is_pxa27x; /* Are we emulating a Intel PXA27x co-processor ? */ + //chy: seems only used in xscale's CP14 - unsigned int LastTime; /* Value of last call to ARMul_Time() */ ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit 3 set */ - - //added by ksh:for handle different machs io 2004-3-5 - ARMul_io mach_io; - - /*added by ksh,2004-11-26,some energy profiling*/ - ARMul_Energy energy; - - //teawater add for next_dis 2004.10.27----------------------- - int disassemble; - - - //teawater add for arm2x86 2005.02.15------------------------------------------- - u32 trap; - u32 tea_break_addr; - u32 tea_break_ok; - int tea_pc; - //teawater add for arm2x86 2005.07.05------------------------------------------- //arm_arm A2-18 - int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model - - //teawater change for return if running tb dirty 2005.07.09--------------------- - void *tb_now; - - - //teawater add for record reg value to ./reg.txt 2005.07.10--------------------- - FILE *tea_reg_fd; - + int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model /*added by ksh in 2005-10-1*/ cpu_config_t *cpu; - //mem_config_t *mem_bank; /* added LPC remap function */ int vector_remap_flag; @@ -367,23 +235,12 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) u32 step; u32 cycle; - int stop_simulator; - conf_object_t *dyncom_cpu; -//teawater add DBCT_TEST_SPEED 2005.10.04--------------------------------------- -#ifdef DBCT_TEST_SPEED - uint64_t instr_count; -#endif //DBCT_TEST_SPEED -// FILE * state_log; -//diff log -//#if DIFF_STATE - FILE * state_log; -//#endif + /* monitored memory for exclusice access */ ARMword exclusive_tag_array[128]; /* 1 means exclusive access and 0 means open access */ ARMword exclusive_access_state; - memory_space_intf space; u32 CurrInstr; u32 last_pc; /* the last pc executed */ u32 last_instr; /* the last inst executed */ @@ -392,56 +249,43 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) u32 WritePc[17]; u32 CurrWrite; }; -#define DIFF_WRITE 0 typedef ARMul_State arm_core_t; -#define ResetPin NresetSig -#define FIQPin NfiqSig -#define IRQPin NirqSig -#define AbortPin abortSig -#define TransPin NtransSig -#define BigEndPin bigendSig -#define Prog32Pin prog32Sig -#define Data32Pin data32Sig -#define LateAbortPin lateabtSig /***************************************************************************\ * Types of ARM we know about * \***************************************************************************/ -/* The bitflags */ -#define ARM_Fix26_Prop 0x01 -#define ARM_Nexec_Prop 0x02 -#define ARM_Debug_Prop 0x10 -#define ARM_Isync_Prop ARM_Debug_Prop -#define ARM_Lock_Prop 0x20 -#define ARM_v4_Prop 0x40 -#define ARM_v5_Prop 0x80 -#define ARM_v6_Prop 0xc0 - -#define ARM_v5e_Prop 0x100 -#define ARM_XScale_Prop 0x200 -#define ARM_ep9312_Prop 0x400 -#define ARM_iWMMXt_Prop 0x800 -#define ARM_PXA27X_Prop 0x1000 -#define ARM_v7_Prop 0x2000 - -/* ARM2 family */ -#define ARM2 (ARM_Fix26_Prop) -#define ARM2as ARM2 -#define ARM61 ARM2 -#define ARM3 ARM2 - -#ifdef ARM60 /* previous definition in armopts.h */ -#undef ARM60 -#endif - -/* ARM6 family */ -#define ARM6 (ARM_Lock_Prop) -#define ARM60 ARM6 -#define ARM600 ARM6 -#define ARM610 ARM6 -#define ARM620 ARM6 +enum { + ARM_Fix26_Prop = 0x01, + ARM_Nexec_Prop = 0x02, + ARM_Debug_Prop = 0x10, + ARM_Isync_Prop = ARM_Debug_Prop, + ARM_Lock_Prop = 0x20, + ARM_v4_Prop = 0x40, + ARM_v5_Prop = 0x80, + ARM_v6_Prop = 0xc0, + + ARM_v5e_Prop = 0x100, + ARM_XScale_Prop = 0x200, + ARM_ep9312_Prop = 0x400, + ARM_iWMMXt_Prop = 0x800, + ARM_PXA27X_Prop = 0x1000, + ARM_v7_Prop = 0x2000, + + // ARM2 family + ARM2 = ARM_Fix26_Prop, + ARM2as = ARM2, + ARM61 = ARM2, + ARM3 = ARM2, + + // ARM6 family + ARM6 = ARM_Lock_Prop, + ARM60 = ARM6, + ARM600 = ARM6, + ARM610 = ARM6, + ARM620 = ARM6 +}; /***************************************************************************\ @@ -456,41 +300,44 @@ typedef ARMul_State arm_core_t; * The hardware vector addresses * \***************************************************************************/ -#define ARMResetV 0L -#define ARMUndefinedInstrV 4L -#define ARMSWIV 8L -#define ARMPrefetchAbortV 12L -#define ARMDataAbortV 16L -#define ARMAddrExceptnV 20L -#define ARMIRQV 24L -#define ARMFIQV 28L -#define ARMErrorV 32L /* This is an offset, not an address ! */ - -#define ARMul_ResetV ARMResetV -#define ARMul_UndefinedInstrV ARMUndefinedInstrV -#define ARMul_SWIV ARMSWIV -#define ARMul_PrefetchAbortV ARMPrefetchAbortV -#define ARMul_DataAbortV ARMDataAbortV -#define ARMul_AddrExceptnV ARMAddrExceptnV -#define ARMul_IRQV ARMIRQV -#define ARMul_FIQV ARMFIQV +enum { + ARMResetV = 0, + ARMUndefinedInstrV = 4, + ARMSWIV = 8, + ARMPrefetchAbortV = 12, + ARMDataAbortV = 16, + ARMAddrExceptnV = 20, + ARMIRQV = 24, + ARMFIQV = 28, + ARMErrorV = 32, // This is an offset, not an address! + + ARMul_ResetV = ARMResetV, + ARMul_UndefinedInstrV = ARMUndefinedInstrV, + ARMul_SWIV = ARMSWIV, + ARMul_PrefetchAbortV = ARMPrefetchAbortV, + ARMul_DataAbortV = ARMDataAbortV, + ARMul_AddrExceptnV = ARMAddrExceptnV, + ARMul_IRQV = ARMIRQV, + ARMul_FIQV = ARMFIQV +}; /***************************************************************************\ * Mode and Bank Constants * \***************************************************************************/ -#define USER26MODE 0L -#define FIQ26MODE 1L -#define IRQ26MODE 2L -#define SVC26MODE 3L -#define USER32MODE 16L -#define FIQ32MODE 17L -#define IRQ32MODE 18L -#define SVC32MODE 19L -#define ABORT32MODE 23L -#define UNDEF32MODE 27L -//chy 2006-02-15 add system32 mode -#define SYSTEM32MODE 31L +enum { + USER26MODE = 0, + FIQ26MODE = 1, + IRQ26MODE = 2, + SVC26MODE = 3, + USER32MODE = 16, + FIQ32MODE = 17, + IRQ32MODE = 18, + SVC32MODE = 19, + ABORT32MODE = 23, + UNDEF32MODE = 27, + SYSTEM32MODE = 31 +}; #define ARM32BITMODE (state->Mode > 3) #define ARM26BITMODE (state->Mode <= 3) @@ -499,14 +346,17 @@ typedef ARMul_State arm_core_t; #define ARMul_MODE32BIT ARM32BITMODE #define ARMul_MODE26BIT ARM26BITMODE -#define USERBANK 0 -#define FIQBANK 1 -#define IRQBANK 2 -#define SVCBANK 3 -#define ABORTBANK 4 -#define UNDEFBANK 5 -#define DUMMYBANK 6 -#define SYSTEMBANK USERBANK +enum { + USERBANK = 0, + FIQBANK = 1, + IRQBANK = 2, + SVCBANK = 3, + ABORTBANK = 4, + UNDEFBANK = 5, + DUMMYBANK = 6, + SYSTEMBANK = USERBANK +}; + #define BANK_CAN_ACCESS_SPSR(bank) \ ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK) @@ -525,13 +375,6 @@ extern void ARMul_Reset(ARMul_State* state); extern ARMul_State *ARMul_NewState(ARMul_State* state); extern ARMword ARMul_DoProg(ARMul_State* state); extern ARMword ARMul_DoInstr(ARMul_State* state); -/***************************************************************************\ -* Definitons of things for event handling * -\***************************************************************************/ - -extern void ARMul_ScheduleEvent(ARMul_State* state, unsigned int delay, unsigned(*func) ()); -extern void ARMul_EnvokeEvent(ARMul_State* state); -extern unsigned int ARMul_Time(ARMul_State* state); /***************************************************************************\ * Useful support routines * @@ -613,40 +456,44 @@ extern ARMword ARMul_MemAccess(ARMul_State* state, ARMword, ARMword, * Definitons of things in the co-processor interface * \***************************************************************************/ -#define ARMul_FIRST 0 -#define ARMul_TRANSFER 1 -#define ARMul_BUSY 2 -#define ARMul_DATA 3 -#define ARMul_INTERRUPT 4 -#define ARMul_DONE 0 -#define ARMul_CANT 1 -#define ARMul_INC 3 - -#define ARMul_CP13_R0_FIQ 0x1 -#define ARMul_CP13_R0_IRQ 0x2 -#define ARMul_CP13_R8_PMUS 0x1 - -#define ARMul_CP14_R0_ENABLE 0x0001 -#define ARMul_CP14_R0_CLKRST 0x0004 -#define ARMul_CP14_R0_CCD 0x0008 -#define ARMul_CP14_R0_INTEN0 0x0010 -#define ARMul_CP14_R0_INTEN1 0x0020 -#define ARMul_CP14_R0_INTEN2 0x0040 -#define ARMul_CP14_R0_FLAG0 0x0100 -#define ARMul_CP14_R0_FLAG1 0x0200 -#define ARMul_CP14_R0_FLAG2 0x0400 -#define ARMul_CP14_R10_MOE_IB 0x0004 -#define ARMul_CP14_R10_MOE_DB 0x0008 -#define ARMul_CP14_R10_MOE_BT 0x000c -#define ARMul_CP15_R1_ENDIAN 0x0080 -#define ARMul_CP15_R1_ALIGN 0x0002 -#define ARMul_CP15_R5_X 0x0400 -#define ARMul_CP15_R5_ST_ALIGN 0x0001 -#define ARMul_CP15_R5_IMPRE 0x0406 -#define ARMul_CP15_R5_MMU_EXCPT 0x0400 -#define ARMul_CP15_DBCON_M 0x0100 -#define ARMul_CP15_DBCON_E1 0x000c -#define ARMul_CP15_DBCON_E0 0x0003 +enum { + ARMul_FIRST = 0, + ARMul_TRANSFER = 1, + ARMul_BUSY = 2, + ARMul_DATA = 3, + ARMul_INTERRUPT = 4, + ARMul_DONE = 0, + ARMul_CANT = 1, + ARMul_INC = 3 +}; + +enum { + ARMul_CP13_R0_FIQ = 0x1, + ARMul_CP13_R0_IRQ = 0x2, + ARMul_CP13_R8_PMUS = 0x1, + + ARMul_CP14_R0_ENABLE = 0x0001, + ARMul_CP14_R0_CLKRST = 0x0004, + ARMul_CP14_R0_CCD = 0x0008, + ARMul_CP14_R0_INTEN0 = 0x0010, + ARMul_CP14_R0_INTEN1 = 0x0020, + ARMul_CP14_R0_INTEN2 = 0x0040, + ARMul_CP14_R0_FLAG0 = 0x0100, + ARMul_CP14_R0_FLAG1 = 0x0200, + ARMul_CP14_R0_FLAG2 = 0x0400, + ARMul_CP14_R10_MOE_IB = 0x0004, + ARMul_CP14_R10_MOE_DB = 0x0008, + ARMul_CP14_R10_MOE_BT = 0x000c, + ARMul_CP15_R1_ENDIAN = 0x0080, + ARMul_CP15_R1_ALIGN = 0x0002, + ARMul_CP15_R5_X = 0x0400, + ARMul_CP15_R5_ST_ALIGN = 0x0001, + ARMul_CP15_R5_IMPRE = 0x0406, + ARMul_CP15_R5_MMU_EXCPT = 0x0400, + ARMul_CP15_DBCON_M = 0x0100, + ARMul_CP15_DBCON_E1 = 0x000c, + ARMul_CP15_DBCON_E0 = 0x0003 +}; extern unsigned ARMul_CoProInit(ARMul_State* state); extern void ARMul_CoProExit(ARMul_State* state); @@ -675,12 +522,9 @@ extern unsigned ARMul_OSHandleSWI(ARMul_State* state, ARMword number); } #endif - extern ARMword ARMul_OSLastErrorP(ARMul_State* state); - extern ARMword ARMul_Debug(ARMul_State* state, ARMword pc, ARMword instr); extern unsigned ARMul_OSException(ARMul_State* state, ARMword vector, ARMword pc); -extern int rdi_log; enum ConditionCode { EQ = 0, @@ -729,70 +573,12 @@ enum ConditionCode { #define IFFLAGS state->IFFlags #endif //VFLAG -#define FLAG_MASK 0xf0000000 -#define NBIT_SHIFT 31 -#define ZBIT_SHIFT 30 -#define CBIT_SHIFT 29 -#define VBIT_SHIFT 28 - -#define SKYEYE_OUTREGS(fd) { fprintf ((fd), "R %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,C %x,S %x,%x,%x,%x,%x,%x,%x,M %x,B %x,E %x,I %x,P %x,T %x,L %x,D %x,",\ - state->Reg[0],state->Reg[1],state->Reg[2],state->Reg[3], \ - state->Reg[4],state->Reg[5],state->Reg[6],state->Reg[7], \ - state->Reg[8],state->Reg[9],state->Reg[10],state->Reg[11], \ - state->Reg[12],state->Reg[13],state->Reg[14],state->Reg[15], \ - state->Cpsr, state->Spsr[0], state->Spsr[1], state->Spsr[2],\ - state->Spsr[3],state->Spsr[4], state->Spsr[5], state->Spsr[6],\ - state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\ - state->temp,state->loaded,state->decoded);} - -#define SKYEYE_OUTMOREREGS(fd) { fprintf ((fd),"\ -RUs %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ -RF %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ -RI %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ -RS %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ -RA %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ -RUn %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x\n",\ - state->RegBank[0][0],state->RegBank[0][1],state->RegBank[0][2],state->RegBank[0][3], \ - state->RegBank[0][4],state->RegBank[0][5],state->RegBank[0][6],state->RegBank[0][7], \ - state->RegBank[0][8],state->RegBank[0][9],state->RegBank[0][10],state->RegBank[0][11], \ - state->RegBank[0][12],state->RegBank[0][13],state->RegBank[0][14],state->RegBank[0][15], \ - state->RegBank[1][0],state->RegBank[1][1],state->RegBank[1][2],state->RegBank[1][3], \ - state->RegBank[1][4],state->RegBank[1][5],state->RegBank[1][6],state->RegBank[1][7], \ - state->RegBank[1][8],state->RegBank[1][9],state->RegBank[1][10],state->RegBank[1][11], \ - state->RegBank[1][12],state->RegBank[1][13],state->RegBank[1][14],state->RegBank[1][15], \ - state->RegBank[2][0],state->RegBank[2][1],state->RegBank[2][2],state->RegBank[2][3], \ - state->RegBank[2][4],state->RegBank[2][5],state->RegBank[2][6],state->RegBank[2][7], \ - state->RegBank[2][8],state->RegBank[2][9],state->RegBank[2][10],state->RegBank[2][11], \ - state->RegBank[2][12],state->RegBank[2][13],state->RegBank[2][14],state->RegBank[2][15], \ - state->RegBank[3][0],state->RegBank[3][1],state->RegBank[3][2],state->RegBank[3][3], \ - state->RegBank[3][4],state->RegBank[3][5],state->RegBank[3][6],state->RegBank[3][7], \ - state->RegBank[3][8],state->RegBank[3][9],state->RegBank[3][10],state->RegBank[3][11], \ - state->RegBank[3][12],state->RegBank[3][13],state->RegBank[3][14],state->RegBank[3][15], \ - state->RegBank[4][0],state->RegBank[4][1],state->RegBank[4][2],state->RegBank[4][3], \ - state->RegBank[4][4],state->RegBank[4][5],state->RegBank[4][6],state->RegBank[4][7], \ - state->RegBank[4][8],state->RegBank[4][9],state->RegBank[4][10],state->RegBank[4][11], \ - state->RegBank[4][12],state->RegBank[4][13],state->RegBank[4][14],state->RegBank[4][15], \ - state->RegBank[5][0],state->RegBank[5][1],state->RegBank[5][2],state->RegBank[5][3], \ - state->RegBank[5][4],state->RegBank[5][5],state->RegBank[5][6],state->RegBank[5][7], \ - state->RegBank[5][8],state->RegBank[5][9],state->RegBank[5][10],state->RegBank[5][11], \ - state->RegBank[5][12],state->RegBank[5][13],state->RegBank[5][14],state->RegBank[5][15] \ - );} - - -#define SA1110 0x6901b110 -#define SA1100 0x4401a100 -#define PXA250 0x69052100 -#define PXA270 0x69054110 -//#define PXA250 0x69052903 -// 0x69052903; //PXA250 B1 from intel 278522-001.pdf - extern bool AddOverflow(ARMword, ARMword, ARMword); extern bool SubOverflow(ARMword, ARMword, ARMword); extern void ARMul_UndefInstr(ARMul_State*, ARMword); extern void ARMul_FixCPSR(ARMul_State*, ARMword, ARMword); extern void ARMul_FixSPSR(ARMul_State*, ARMword, ARMword); -extern void ARMul_ConsolePrint(ARMul_State*, const char*, ...); extern void ARMul_SelectProcessor(ARMul_State*, unsigned); extern u32 AddWithCarry(u32, u32, u32, bool*, bool*); @@ -810,8 +596,3 @@ extern u16 ARMul_UnsignedSaturatedSub16(u16, u16); extern u8 ARMul_UnsignedAbsoluteDifference(u8, u8); extern u32 ARMul_SignedSatQ(s32, u8, bool*); extern u32 ARMul_UnsignedSatQ(s32, u8, bool*); - -#define DIFF_LOG 0 -#define SAVE_LOG 0 - -#endif /* _ARMDEFS_H_ */ diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index 1dfcc635a..686b2a3f6 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -575,8 +575,6 @@ extern ARMword ARMul_GetPC (ARMul_State *); extern ARMword ARMul_GetNextPC (ARMul_State *); extern ARMword ARMul_GetR15 (ARMul_State *); extern ARMword ARMul_GetCPSR (ARMul_State *); -extern void ARMul_EnvokeEvent (ARMul_State *); -extern unsigned int ARMul_Time (ARMul_State *); extern void ARMul_NegZero (ARMul_State *, ARMword); extern void ARMul_SetPC (ARMul_State *, ARMword); extern void ARMul_SetR15 (ARMul_State *, ARMword); @@ -603,8 +601,7 @@ extern void ARMul_AddCarry (ARMul_State *, ARMword, ARMword, ARMword); extern tdstate ARMul_ThumbDecode (ARMul_State *, ARMword, ARMword, ARMword *); extern ARMword ARMul_GetReg (ARMul_State *, unsigned, unsigned); extern void ARMul_SetReg (ARMul_State *, unsigned, unsigned, ARMword); -extern void ARMul_ScheduleEvent (ARMul_State *, unsigned int, - unsigned (*)(ARMul_State *)); + /* Coprocessor support functions. */ extern unsigned ARMul_CoProInit (ARMul_State *); extern void ARMul_CoProExit (ARMul_State *); diff --git a/src/core/arm/skyeye_common/skyeye_defs.h b/src/core/arm/skyeye_common/skyeye_defs.h index d4088383f..6648e9d66 100644 --- a/src/core/arm/skyeye_common/skyeye_defs.h +++ b/src/core/arm/skyeye_common/skyeye_defs.h @@ -1,5 +1,4 @@ -#ifndef CORE_ARM_SKYEYE_DEFS_H_ -#define CORE_ARM_SKYEYE_DEFS_H_ +#pragma once #include "common/common.h" @@ -8,21 +7,15 @@ typedef struct { - const char *cpu_arch_name; /*cpu architecture version name.e.g. armv4t */ - const char *cpu_name; /*cpu name. e.g. arm7tdmi or arm720t */ - u32 cpu_val; /*CPU value; also call MMU ID or processor id;see - ARM Architecture Reference Manual B2-6 */ - u32 cpu_mask; /*cpu_val's mask. */ - u32 cachetype; /*this cpu has what kind of cache */ + const char *cpu_arch_name; /* CPU architecture version name.e.g. armv4t */ + const char *cpu_name; /* CPU name. e.g. arm7tdmi or arm720t */ + u32 cpu_val; /*CPU value; also call MMU ID or processor id;see + ARM Architecture Reference Manual B2-6 */ + u32 cpu_mask; /* cpu_val's mask. */ + u32 cachetype; /* this CPU has what kind of cache */ } cpu_config_t; -typedef struct conf_object_s{ - char* objname; - void* obj; - char* class_name; -}conf_object_t; - -typedef enum{ +typedef enum { /* No exception */ No_exp = 0, /* Memory allocation exception */ @@ -44,70 +37,21 @@ typedef enum{ /* Unknown exception */ Unknown_exp -}exception_t; +} exception_t; typedef enum { Align = 0, UnAlign -}align_t; +} align_t; typedef enum { Little_endian = 0, Big_endian -}endian_t; -//typedef int exception_t; +} endian_t; -typedef enum{ +typedef enum { Phys_addr = 0, Virt_addr -}addr_type_t; - -typedef exception_t(*read_byte_t)(conf_object_t* target, u32 addr, void *buf, size_t count); -typedef exception_t(*write_byte_t)(conf_object_t* target, u32 addr, const void *buf, size_t count); - -typedef struct memory_space{ - conf_object_t* conf_obj; - read_byte_t read; - write_byte_t write; -}memory_space_intf; - - -/* - * a running instance for a specific archteciture. - */ -typedef struct generic_arch_s -{ - char* arch_name; - void (*init) (void); - void (*reset) (void); - void (*step_once) (void); - void (*set_pc)(u32 addr); - u32 (*get_pc)(void); - u32 (*get_step)(void); - //chy 2004-04-15 - //int (*ICE_write_byte) (u32 addr, uint8_t v); - //int (*ICE_read_byte)(u32 addr, uint8_t *pv); - u32 (*get_regval_by_id)(int id); - u32 (*get_regnum)(void); - char* (*get_regname_by_id)(int id); - exception_t (*set_regval_by_id)(int id, u32 value); - /* - * read a data by virtual address. - */ - exception_t (*mmu_read)(short size, u32 addr, u32 * value); - /* - * write a data by a virtual address. - */ - exception_t (*mmu_write)(short size, u32 addr, u32 value); - /** - * get a signal from external - */ - //exception_t (*signal)(interrupt_signal_t* signal); - - endian_t endianess; - align_t alignment; -} generic_arch_t; +} addr_type_t; typedef u32 addr_t; - -#endif |