From f9cc6d648469dbf454997ff7f61ae457ff11a4bb Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 6 Apr 2015 15:58:45 -0400 Subject: vfp: Get rid of the VFP_OFFSET macro --- src/core/arm/skyeye_common/arm_regformat.h | 15 +++--- src/core/arm/skyeye_common/armdefs.h | 6 ++- src/core/arm/skyeye_common/vfp/vfp.cpp | 28 +++++----- src/core/arm/skyeye_common/vfp/vfp.h | 2 +- src/core/arm/skyeye_common/vfp/vfpinstr.cpp | 82 ++++++++++++++--------------- 5 files changed, 69 insertions(+), 64 deletions(-) diff --git a/src/core/arm/skyeye_common/arm_regformat.h b/src/core/arm/skyeye_common/arm_regformat.h index d125dc2fc..6c89774eb 100644 --- a/src/core/arm/skyeye_common/arm_regformat.h +++ b/src/core/arm/skyeye_common/arm_regformat.h @@ -51,13 +51,18 @@ enum { EXCLUSIVE_STATE, EXCLUSIVE_RESULT, - // VFP registers - VFP_BASE, - VFP_FPSID = VFP_BASE, + MAX_REG_NUM, +}; + +// VFP system registers +enum { + VFP_FPSID, VFP_FPSCR, VFP_FPEXC, - MAX_REG_NUM, + // Not an actual register. + // All VFP system registers should be defined above this. + VFP_SYSTEM_REGISTER_COUNT }; enum CP15Register { @@ -176,5 +181,3 @@ enum CP15Register { // All registers should be defined above this. CP15_REGISTER_COUNT, }; - -#define VFP_OFFSET(x) (x - VFP_BASE) diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index 12fa533f7..743e935f0 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -92,13 +92,15 @@ struct ARMul_State ARMword exclusive_state; ARMword exclusive_result; ARMword CP15[CP15_REGISTER_COUNT]; - ARMword VFP[3]; // FPSID, FPSCR, and FPEXC + + // FPSID, FPSCR, and FPEXC + ARMword VFP[VFP_SYSTEM_REGISTER_COUNT]; // VFPv2 and VFPv3-D16 has 16 doubleword registers (D0-D16 or S0-S31). // VFPv3-D32/ASIMD may have up to 32 doubleword registers (D0-D31), // and only 32 singleword registers are accessible (S0-S31). ARMword ExtReg[VFP_REG_NUM]; /* ---- End of the ordered registers ---- */ - + ARMword RegBank[7][16]; // all the registers ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; // Dummy flags for speed diff --git a/src/core/arm/skyeye_common/vfp/vfp.cpp b/src/core/arm/skyeye_common/vfp/vfp.cpp index 6286e7b62..d793261fd 100644 --- a/src/core/arm/skyeye_common/vfp/vfp.cpp +++ b/src/core/arm/skyeye_common/vfp/vfp.cpp @@ -29,10 +29,10 @@ unsigned VFPInit(ARMul_State* state) { - state->VFP[VFP_OFFSET(VFP_FPSID)] = VFP_FPSID_IMPLMEN<<24 | VFP_FPSID_SW<<23 | VFP_FPSID_SUBARCH<<16 | - VFP_FPSID_PARTNUM<<8 | VFP_FPSID_VARIANT<<4 | VFP_FPSID_REVISION; - state->VFP[VFP_OFFSET(VFP_FPEXC)] = 0; - state->VFP[VFP_OFFSET(VFP_FPSCR)] = 0; + state->VFP[VFP_FPSID] = VFP_FPSID_IMPLMEN<<24 | VFP_FPSID_SW<<23 | VFP_FPSID_SUBARCH<<16 | + VFP_FPSID_PARTNUM<<8 | VFP_FPSID_VARIANT<<4 | VFP_FPSID_REVISION; + state->VFP[VFP_FPEXC] = 0; + state->VFP[VFP_FPSCR] = 0; return 0; } @@ -314,11 +314,11 @@ unsigned VFPCDP(ARMul_State* state, unsigned type, u32 instr) int exceptions = 0; if (CoProc == 10) - exceptions = vfp_single_cpdo(state, instr, state->VFP[VFP_OFFSET(VFP_FPSCR)]); + exceptions = vfp_single_cpdo(state, instr, state->VFP[VFP_FPSCR]); else - exceptions = vfp_double_cpdo(state, instr, state->VFP[VFP_OFFSET(VFP_FPSCR)]); + exceptions = vfp_double_cpdo(state, instr, state->VFP[VFP_FPSCR]); - vfp_raise_exceptions(state, exceptions, instr, state->VFP[VFP_OFFSET(VFP_FPSCR)]); + vfp_raise_exceptions(state, exceptions, instr, state->VFP[VFP_FPSCR]); return ARMul_DONE; } @@ -344,11 +344,11 @@ void VMRS(ARMul_State* state, ARMword reg, ARMword Rt, ARMword* value) { if (Rt != 15) { - *value = state->VFP[VFP_OFFSET(VFP_FPSCR)]; + *value = state->VFP[VFP_FPSCR]; } else { - *value = state->VFP[VFP_OFFSET(VFP_FPSCR)] ; + *value = state->VFP[VFP_FPSCR] ; } } else @@ -356,7 +356,7 @@ void VMRS(ARMul_State* state, ARMword reg, ARMword Rt, ARMword* value) switch (reg) { case 0: - *value = state->VFP[VFP_OFFSET(VFP_FPSID)]; + *value = state->VFP[VFP_FPSID]; break; case 6: /* MVFR1, VFPv3 only ? */ @@ -367,7 +367,7 @@ void VMRS(ARMul_State* state, ARMword reg, ARMword Rt, ARMword* value) LOG_TRACE(Core_ARM11, "\tr%d <= MVFR0 unimplemented\n", Rt); break; case 8: - *value = state->VFP[VFP_OFFSET(VFP_FPEXC)]; + *value = state->VFP[VFP_FPEXC]; break; default: LOG_TRACE(Core_ARM11, "\tSUBARCHITECTURE DEFINED\n"); @@ -407,11 +407,11 @@ void VMSR(ARMul_State* state, ARMword reg, ARMword Rt) { if (reg == 1) { - state->VFP[VFP_OFFSET(VFP_FPSCR)] = state->Reg[Rt]; + state->VFP[VFP_FPSCR] = state->Reg[Rt]; } else if (reg == 8) { - state->VFP[VFP_OFFSET(VFP_FPEXC)] = state->Reg[Rt]; + state->VFP[VFP_FPEXC] = state->Reg[Rt]; } } @@ -774,5 +774,5 @@ void vfp_raise_exceptions(ARMul_State* state, u32 exceptions, u32 inst, u32 fpsc fpscr |= exceptions; - state->VFP[VFP_OFFSET(VFP_FPSCR)] = fpscr; + state->VFP[VFP_FPSCR] = fpscr; } diff --git a/src/core/arm/skyeye_common/vfp/vfp.h b/src/core/arm/skyeye_common/vfp/vfp.h index 445a224bc..1b72383e7 100644 --- a/src/core/arm/skyeye_common/vfp/vfp.h +++ b/src/core/arm/skyeye_common/vfp/vfp.h @@ -25,7 +25,7 @@ #define VFP_DEBUG_UNIMPLEMENTED(x) LOG_ERROR(Core_ARM11, "in func %s, " #x " unimplemented\n", __FUNCTION__); exit(-1); #define VFP_DEBUG_UNTESTED(x) LOG_TRACE(Core_ARM11, "in func %s, " #x " untested\n", __FUNCTION__); #define CHECK_VFP_ENABLED -#define CHECK_VFP_CDP_RET vfp_raise_exceptions(cpu, ret, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); //if (ret == -1) {printf("VFP CDP FAILURE %x\n", inst_cream->instr); exit(-1);} +#define CHECK_VFP_CDP_RET vfp_raise_exceptions(cpu, ret, inst_cream->instr, cpu->VFP[VFP_FPSCR]); unsigned VFPInit(ARMul_State* state); unsigned VFPMRC(ARMul_State* state, unsigned type, ARMword instr, ARMword* value); diff --git a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp index 368b5a25d..72afe2164 100644 --- a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp +++ b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp @@ -46,9 +46,9 @@ VMLA_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -96,9 +96,9 @@ VMLS_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -146,9 +146,9 @@ VNMLA_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -197,9 +197,9 @@ VNMLS_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -247,9 +247,9 @@ VNMUL_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -297,9 +297,9 @@ VMUL_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -347,9 +347,9 @@ VADD_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -397,9 +397,9 @@ VSUB_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -447,9 +447,9 @@ VDIV_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -591,9 +591,9 @@ VABS_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -642,9 +642,9 @@ VNEG_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -692,9 +692,9 @@ VSQRT_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -742,9 +742,9 @@ VCMP_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -792,9 +792,9 @@ VCMP2_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -842,9 +842,9 @@ VCVTBDS_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -894,9 +894,9 @@ VCVTBFF_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -944,9 +944,9 @@ VCVTBFI_INST: int ret; if (inst_cream->dp_operation) - ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_double_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); else - ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_OFFSET(VFP_FPSCR)]); + ret = vfp_single_cpdo(cpu, inst_cream->instr, cpu->VFP[VFP_FPSCR]); CHECK_VFP_CDP_RET; } @@ -1146,14 +1146,14 @@ VMRS_INST: { if (inst_cream->Rt != 15) { - cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_OFFSET(VFP_FPSCR)]; + cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_FPSCR]; } else { - cpu->NFlag = (cpu->VFP[VFP_OFFSET(VFP_FPSCR)] >> 31) & 1; - cpu->ZFlag = (cpu->VFP[VFP_OFFSET(VFP_FPSCR)] >> 30) & 1; - cpu->CFlag = (cpu->VFP[VFP_OFFSET(VFP_FPSCR)] >> 29) & 1; - cpu->VFlag = (cpu->VFP[VFP_OFFSET(VFP_FPSCR)] >> 28) & 1; + cpu->NFlag = (cpu->VFP[VFP_FPSCR] >> 31) & 1; + cpu->ZFlag = (cpu->VFP[VFP_FPSCR] >> 30) & 1; + cpu->CFlag = (cpu->VFP[VFP_FPSCR] >> 29) & 1; + cpu->VFlag = (cpu->VFP[VFP_FPSCR] >> 28) & 1; } } else @@ -1161,7 +1161,7 @@ VMRS_INST: switch (inst_cream->reg) { case 0: - cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_OFFSET(VFP_FPSID)]; + cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_FPSID]; break; case 6: /* MVFR1, VFPv3 only ? */ @@ -1172,7 +1172,7 @@ VMRS_INST: LOG_TRACE(Core_ARM11, "\tr%d <= MVFR0 unimplemented\n", inst_cream->Rt); break; case 8: - cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_OFFSET(VFP_FPEXC)]; + cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_FPEXC]; break; default: break; -- cgit v1.2.3 From 29a4b6c7edcb0f27cef2a97edb11acb6773a4039 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 6 Apr 2015 16:05:11 -0400 Subject: vfp: Make the FPSID values match the MPCore --- src/core/arm/skyeye_common/vfp/asm_vfp.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/core/arm/skyeye_common/vfp/asm_vfp.h b/src/core/arm/skyeye_common/vfp/asm_vfp.h index ccb7cf4d7..1187924f4 100644 --- a/src/core/arm/skyeye_common/vfp/asm_vfp.h +++ b/src/core/arm/skyeye_common/vfp/asm_vfp.h @@ -7,15 +7,15 @@ #pragma once -// FPSID Information +// ARM11 MPCore FPSID Information // Note that these are used as values and not as flags. enum : u32 { - VFP_FPSID_IMPLMEN = 0, // Implementation code. Should be the same as cp15 0 c0 0 - VFP_FPSID_SW = 0, // Software emulation bit value - VFP_FPSID_SUBARCH = 0x2, // Subarchitecture version number - VFP_FPSID_PARTNUM = 0x1, // Part number - VFP_FPSID_VARIANT = 0x1, // Variant number - VFP_FPSID_REVISION = 0x1 // Revision number + VFP_FPSID_IMPLMEN = 0x41, // Implementation code. Should be the same as cp15 0 c0 0 + VFP_FPSID_SW = 0, // Software emulation bit value + VFP_FPSID_SUBARCH = 0x1, // Subarchitecture version number + VFP_FPSID_PARTNUM = 0x20, // Part number + VFP_FPSID_VARIANT = 0xB, // Variant number + VFP_FPSID_REVISION = 0x4 // Revision number }; // FPEXC bits -- cgit v1.2.3