From 6d0078004543567fb9d50c9c5e26540432ea7868 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 25 Apr 2018 12:17:25 -0400 Subject: core/memory: Amend address widths in asserts Addresses are 64-bit, these formatting specifiers are simply holdovers from citra. Adjust them to be the correct width. --- src/core/memory.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/core/memory.cpp b/src/core/memory.cpp index 9c207b74a..d7c0080fa 100644 --- a/src/core/memory.cpp +++ b/src/core/memory.cpp @@ -172,7 +172,7 @@ T Read(const VAddr vaddr) { NGLOG_ERROR(HW_Memory, "Unmapped Read{} @ {:#010X}", sizeof(T) * 8, vaddr); return 0; case PageType::Memory: - ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr); + ASSERT_MSG(false, "Mapped memory page without a pointer @ %016" PRIX64, vaddr); break; case PageType::RasterizerCachedMemory: { RasterizerFlushVirtualRegion(vaddr, sizeof(T), FlushMode::Flush); @@ -205,7 +205,7 @@ void Write(const VAddr vaddr, const T data) { vaddr); return; case PageType::Memory: - ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr); + ASSERT_MSG(false, "Mapped memory page without a pointer @ %016" PRIX64, vaddr); break; case PageType::RasterizerCachedMemory: { RasterizerFlushVirtualRegion(vaddr, sizeof(T), FlushMode::Invalidate); -- cgit v1.2.3