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| author | Lioncash <mathew1800@gmail.com> | 2015-01-17 19:51:00 +0100 |
|---|---|---|
| committer | Lioncash <mathew1800@gmail.com> | 2015-01-17 19:53:35 +0100 |
| commit | 8575010a68e6d0fd28a81b5080efc04f5a5b2d16 (patch) | |
| tree | 2a7cd0604af5ca2ded1c209e55888bf1845b6345 | |
| parent | Merge pull request #488 from lioncash/strbt (diff) | |
| download | yuzu-8575010a68e6d0fd28a81b5080efc04f5a5b2d16.tar yuzu-8575010a68e6d0fd28a81b5080efc04f5a5b2d16.tar.gz yuzu-8575010a68e6d0fd28a81b5080efc04f5a5b2d16.tar.bz2 yuzu-8575010a68e6d0fd28a81b5080efc04f5a5b2d16.tar.lz yuzu-8575010a68e6d0fd28a81b5080efc04f5a5b2d16.tar.xz yuzu-8575010a68e6d0fd28a81b5080efc04f5a5b2d16.tar.zst yuzu-8575010a68e6d0fd28a81b5080efc04f5a5b2d16.zip | |
Diffstat (limited to '')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 34 |
1 files changed, 24 insertions, 10 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 6052e4f58..d0347566c 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -1840,17 +1840,24 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsh)(unsigned int inst, int index) } ARM_INST_PTR INTERPRETER_TRANSLATE(ldrt)(unsigned int inst, int index) { - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); - ldst_inst *inst_cream = (ldst_inst *)inst_base->component; + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); + ldst_inst* inst_cream = (ldst_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = NON_BRANCH; + inst_base->idx = index; + inst_base->br = NON_BRANCH; inst_cream->inst = inst; - if (I_BIT == 0) { + if (BITS(inst, 25, 27) == 2) { inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed); + } else if (BITS(inst, 25, 27) == 3) { + inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed); } else { + // Reaching this would indicate the thumb version + // of this instruction, however the 3DS CPU doesn't + // support this variant (the 3DS CPU is only ARMv6K, + // while this variant is added in ARMv6T2). + // So it's sufficient for citra to not implement this. DEBUG_MSG; } @@ -2792,17 +2799,24 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(strh)(unsigned int inst, int index) } ARM_INST_PTR INTERPRETER_TRANSLATE(strt)(unsigned int inst, int index) { - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); - ldst_inst *inst_cream = (ldst_inst *)inst_base->component; + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); + ldst_inst* inst_cream = (ldst_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = NON_BRANCH; + inst_base->idx = index; + inst_base->br = NON_BRANCH; inst_cream->inst = inst; - if (I_BIT == 0) { + if (BITS(inst, 25, 27) == 2) { inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed); + } else if (BITS(inst, 25, 27) == 3) { + inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed); } else { + // Reaching this would indicate the thumb version + // of this instruction, however the 3DS CPU doesn't + // support this variant (the 3DS CPU is only ARMv6K, + // while this variant is added in ARMv6T2). + // So it's sufficient for citra to not implement this. DEBUG_MSG; } |