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author | bunnei <bunneidev@gmail.com> | 2017-10-10 05:56:20 +0200 |
---|---|---|
committer | bunnei <bunneidev@gmail.com> | 2017-10-10 05:56:20 +0200 |
commit | b1d5db1cf60344b6b081c9d03cb6ccc3264326cd (patch) | |
tree | fde377c4ba3c0f92c032e6f5ec8627aae37270ef /src/core/arm/dyncom | |
parent | loader: Various improvements for NSO/NRO loaders. (diff) | |
parent | Merge pull request #2996 from MerryMage/split-travis (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom.cpp | 19 | ||||
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom.h | 5 | ||||
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 8 |
3 files changed, 19 insertions, 13 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 99758fc2a..5ebf7a2f1 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -29,6 +29,10 @@ void ARM_DynCom::SetPC(u64 pc) { state->Reg[15] = pc; } +void ARM_DynCom::PageTableChanged() { + ClearInstructionCache(); +} + u64 ARM_DynCom::GetPC() const { return state->Reg[15]; } @@ -41,6 +45,13 @@ void ARM_DynCom::SetReg(int index, u64 value) { state->Reg[index] = value; } +const u128& ARM_DynCom::GetExtReg(int index) const { + return {}; +} + +void ARM_DynCom::SetExtReg(int index, u128& value) { +} + u32 ARM_DynCom::GetVFPReg(int index) const { return state->ExtReg[index]; } @@ -80,12 +91,6 @@ VAddr ARM_DynCom::GetTlsAddress() const { void ARM_DynCom::SetTlsAddress(VAddr /*address*/) { } -void ARM_DynCom::AddTicks(u64 ticks) { - down_count -= ticks; - if (down_count < 0) - CoreTiming::Advance(); -} - void ARM_DynCom::ExecuteInstructions(int num_instructions) { state->NumInstrsToExecute = num_instructions; @@ -93,7 +98,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) { // executing one instruction at a time. Otherwise, if a block is being executed, more // instructions may actually be executed than specified. unsigned ticks_executed = InterpreterMainLoop(state.get()); - AddTicks(ticks_executed); + CoreTiming::AddTicks(ticks_executed); } void ARM_DynCom::SaveContext(ThreadContext& ctx) { diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h index 44e674ae2..cc3c0f3da 100644 --- a/src/core/arm/dyncom/arm_dyncom.h +++ b/src/core/arm/dyncom/arm_dyncom.h @@ -16,11 +16,14 @@ public: ~ARM_DynCom(); void ClearInstructionCache() override; + void PageTableChanged() override; void SetPC(u64 pc) override; u64 GetPC() const override; u64 GetReg(int index) const override; void SetReg(int index, u64 value) override; + const u128& GetExtReg(int index) const override; + void SetExtReg(int index, u128& value) override; u32 GetVFPReg(int index) const override; void SetVFPReg(int index, u32 value) override; u32 GetVFPSystemReg(VFPSystemRegister reg) const override; @@ -32,8 +35,6 @@ public: VAddr GetTlsAddress() const override; void SetTlsAddress(VAddr address) override; - void AddTicks(u64 ticks) override; - void SaveContext(ThreadContext& ctx) override; void LoadContext(const ThreadContext& ctx) override; diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index f4fbb8d04..3522d1e82 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -759,7 +759,7 @@ static ThumbDecodeStatus DecodeThumbInstruction(u32 inst, u32 addr, u32* arm_ins ThumbDecodeStatus ret = TranslateThumbInstruction(addr, inst, arm_inst, inst_size); if (ret == ThumbDecodeStatus::BRANCH) { int inst_index; - int table_length = arm_instruction_trans_len; + int table_length = static_cast<int>(arm_instruction_trans_len); u32 tinstr = GetThumbInstruction(inst, addr); switch ((tinstr & 0xF800) >> 11) { @@ -838,7 +838,7 @@ static unsigned int InterpreterTranslateInstruction(const ARMul_State* cpu, cons return inst_size; } -static int InterpreterTranslateBlock(ARMul_State* cpu, int& bb_start, u32 addr) { +static int InterpreterTranslateBlock(ARMul_State* cpu, std::size_t& bb_start, u32 addr) { MICROPROFILE_SCOPE(DynCom_Decode); // Decode instruction, get index @@ -871,7 +871,7 @@ static int InterpreterTranslateBlock(ARMul_State* cpu, int& bb_start, u32 addr) return KEEP_GOING; } -static int InterpreterTranslateSingle(ARMul_State* cpu, int& bb_start, u32 addr) { +static int InterpreterTranslateSingle(ARMul_State* cpu, std::size_t& bb_start, u32 addr) { MICROPROFILE_SCOPE(DynCom_Decode); ARM_INST_PTR inst_base = nullptr; @@ -1620,7 +1620,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { unsigned int addr; unsigned int num_instrs = 0; - int ptr; + std::size_t ptr; LOAD_NZCVT; DISPATCH : { |