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author | Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> | 2016-09-18 02:38:01 +0200 |
---|---|---|
committer | Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> | 2016-09-18 02:38:01 +0200 |
commit | dc8479928c5aee4c6ad6fe4f59006fb604cee701 (patch) | |
tree | 569a7f13128450bbab973236615587ff00bced5f /src/core/arm/skyeye_common/vfp/vfpinstr.cpp | |
parent | Travis: Import Dolphin’s clang-format hook. (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/core/arm/skyeye_common/vfp/vfpinstr.cpp | 757 |
1 files changed, 336 insertions, 421 deletions
diff --git a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp index 1a98d0114..a66dc1016 100644 --- a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp +++ b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp @@ -19,14 +19,13 @@ struct vmla_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmla_inst)); - vmla_inst *inst_cream = (vmla_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmla_inst)); + vmla_inst* inst_cream = (vmla_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -35,12 +34,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VMLA_INST: -{ +VMLA_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vmla_inst *inst_cream = (vmla_inst *)inst_base->component; + vmla_inst* inst_cream = (vmla_inst*)inst_base->component; int ret; @@ -68,14 +66,13 @@ struct vmls_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmls_inst)); - vmls_inst *inst_cream = (vmls_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmls_inst)); + vmls_inst* inst_cream = (vmls_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -84,12 +81,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VMLS_INST: -{ +VMLS_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vmls_inst *inst_cream = (vmls_inst *)inst_base->component; + vmls_inst* inst_cream = (vmls_inst*)inst_base->component; int ret; @@ -117,14 +113,13 @@ struct vnmla_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmla_inst)); - vnmla_inst *inst_cream = (vnmla_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vnmla_inst)); + vnmla_inst* inst_cream = (vnmla_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -133,12 +128,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VNMLA_INST: -{ +VNMLA_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vnmla_inst *inst_cream = (vnmla_inst *)inst_base->component; + vnmla_inst* inst_cream = (vnmla_inst*)inst_base->component; int ret; @@ -167,14 +161,13 @@ struct vnmls_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmls_inst)); - vnmls_inst *inst_cream = (vnmls_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vnmls_inst)); + vnmls_inst* inst_cream = (vnmls_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -183,12 +176,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VNMLS_INST: -{ +VNMLS_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vnmls_inst *inst_cream = (vnmls_inst *)inst_base->component; + vnmls_inst* inst_cream = (vnmls_inst*)inst_base->component; int ret; @@ -216,14 +208,13 @@ struct vnmul_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmul_inst)); - vnmul_inst *inst_cream = (vnmul_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vnmul_inst)); + vnmul_inst* inst_cream = (vnmul_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -232,12 +223,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VNMUL_INST: -{ +VNMUL_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vnmul_inst *inst_cream = (vnmul_inst *)inst_base->component; + vnmul_inst* inst_cream = (vnmul_inst*)inst_base->component; int ret; @@ -265,14 +255,13 @@ struct vmul_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmul_inst)); - vmul_inst *inst_cream = (vmul_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmul_inst)); + vmul_inst* inst_cream = (vmul_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -281,12 +270,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VMUL_INST: -{ +VMUL_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vmul_inst *inst_cream = (vmul_inst *)inst_base->component; + vmul_inst* inst_cream = (vmul_inst*)inst_base->component; int ret; @@ -314,14 +302,13 @@ struct vadd_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vadd_inst)); - vadd_inst *inst_cream = (vadd_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vadd_inst)); + vadd_inst* inst_cream = (vadd_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -330,12 +317,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VADD_INST: -{ +VADD_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vadd_inst *inst_cream = (vadd_inst *)inst_base->component; + vadd_inst* inst_cream = (vadd_inst*)inst_base->component; int ret; @@ -363,14 +349,13 @@ struct vsub_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsub_inst)); - vsub_inst *inst_cream = (vsub_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vsub_inst)); + vsub_inst* inst_cream = (vsub_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -379,12 +364,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VSUB_INST: -{ +VSUB_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vsub_inst *inst_cream = (vsub_inst *)inst_base->component; + vsub_inst* inst_cream = (vsub_inst*)inst_base->component; int ret; @@ -412,14 +396,13 @@ struct vdiv_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vdiv_inst)); - vdiv_inst *inst_cream = (vdiv_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vdiv_inst)); + vdiv_inst* inst_cream = (vdiv_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -428,12 +411,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VDIV_INST: -{ +VDIV_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vdiv_inst *inst_cream = (vdiv_inst *)inst_base->component; + vdiv_inst* inst_cream = (vdiv_inst*)inst_base->component; int ret; @@ -463,32 +445,33 @@ struct vmovi_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovi)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovi_inst)); - vmovi_inst *inst_cream = (vmovi_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovi)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmovi_inst)); + vmovi_inst* inst_cream = (vmovi_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->single = BIT(inst, 8) == 0; - inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); + inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15) << 1 | BIT(inst, 22) + : BITS(inst, 12, 15) | BIT(inst, 22) << 4); unsigned int imm8 = BITS(inst, 16, 19) << 4 | BITS(inst, 0, 3); if (inst_cream->single) - inst_cream->imm = BIT(imm8, 7)<<31 | (BIT(imm8, 6)==0)<<30 | (BIT(imm8, 6) ? 0x1f : 0)<<25 | BITS(imm8, 0, 5)<<19; + inst_cream->imm = BIT(imm8, 7) << 31 | (BIT(imm8, 6) == 0) << 30 | + (BIT(imm8, 6) ? 0x1f : 0) << 25 | BITS(imm8, 0, 5) << 19; else - inst_cream->imm = BIT(imm8, 7)<<31 | (BIT(imm8, 6)==0)<<30 | (BIT(imm8, 6) ? 0xff : 0)<<22 | BITS(imm8, 0, 5)<<16; + inst_cream->imm = BIT(imm8, 7) << 31 | (BIT(imm8, 6) == 0) << 30 | + (BIT(imm8, 6) ? 0xff : 0) << 22 | BITS(imm8, 0, 5) << 16; return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VMOVI_INST: -{ +VMOVI_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vmovi_inst *inst_cream = (vmovi_inst *)inst_base->component; + vmovi_inst* inst_cream = (vmovi_inst*)inst_base->component; VMOVI(cpu, inst_cream->single, inst_cream->d, inst_cream->imm); } @@ -511,28 +494,28 @@ struct vmovr_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovr_inst)); - vmovr_inst *inst_cream = (vmovr_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmovr_inst)); + vmovr_inst* inst_cream = (vmovr_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->single = BIT(inst, 8) == 0; - inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); - inst_cream->m = (inst_cream->single ? BITS(inst, 0, 3)<<1 | BIT(inst, 5) : BITS(inst, 0, 3) | BIT(inst, 5)<<4); + inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15) << 1 | BIT(inst, 22) + : BITS(inst, 12, 15) | BIT(inst, 22) << 4); + inst_cream->m = (inst_cream->single ? BITS(inst, 0, 3) << 1 | BIT(inst, 5) + : BITS(inst, 0, 3) | BIT(inst, 5) << 4); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VMOVR_INST: -{ +VMOVR_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vmovr_inst *inst_cream = (vmovr_inst *)inst_base->component; + vmovr_inst* inst_cream = (vmovr_inst*)inst_base->component; VMOVR(cpu, inst_cream->single, inst_cream->d, inst_cream->m); } @@ -553,14 +536,13 @@ typedef struct _vabs_inst { } vabs_inst; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vabs_inst)); - vabs_inst *inst_cream = (vabs_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vabs_inst)); + vabs_inst* inst_cream = (vabs_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -569,12 +551,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VABS_INST: -{ +VABS_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vabs_inst *inst_cream = (vabs_inst *)inst_base->component; + vabs_inst* inst_cream = (vabs_inst*)inst_base->component; int ret; @@ -603,14 +584,13 @@ struct vneg_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vneg_inst)); - vneg_inst *inst_cream = (vneg_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vneg_inst)); + vneg_inst* inst_cream = (vneg_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -619,12 +599,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VNEG_INST: -{ +VNEG_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vneg_inst *inst_cream = (vneg_inst *)inst_base->component; + vneg_inst* inst_cream = (vneg_inst*)inst_base->component; int ret; @@ -652,14 +631,13 @@ struct vsqrt_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsqrt_inst)); - vsqrt_inst *inst_cream = (vsqrt_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vsqrt_inst)); + vsqrt_inst* inst_cream = (vsqrt_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -668,12 +646,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VSQRT_INST: -{ +VSQRT_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vsqrt_inst *inst_cream = (vsqrt_inst *)inst_base->component; + vsqrt_inst* inst_cream = (vsqrt_inst*)inst_base->component; int ret; @@ -701,14 +678,13 @@ struct vcmp_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp_inst)); - vcmp_inst *inst_cream = (vcmp_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp_inst)); + vcmp_inst* inst_cream = (vcmp_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -717,12 +693,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VCMP_INST: -{ +VCMP_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vcmp_inst *inst_cream = (vcmp_inst *)inst_base->component; + vcmp_inst* inst_cream = (vcmp_inst*)inst_base->component; int ret; @@ -750,14 +725,13 @@ struct vcmp2_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp2_inst)); - vcmp2_inst *inst_cream = (vcmp2_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp2_inst)); + vcmp2_inst* inst_cream = (vcmp2_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -766,12 +740,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VCMP2_INST: -{ +VCMP2_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vcmp2_inst *inst_cream = (vcmp2_inst *)inst_base->component; + vcmp2_inst* inst_cream = (vcmp2_inst*)inst_base->component; int ret; @@ -799,14 +772,13 @@ struct vcvtbds_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbds_inst)); - vcvtbds_inst *inst_cream = (vcvtbds_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbds_inst)); + vcvtbds_inst* inst_cream = (vcvtbds_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -815,12 +787,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VCVTBDS_INST: -{ +VCVTBDS_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vcvtbds_inst *inst_cream = (vcvtbds_inst *)inst_base->component; + vcvtbds_inst* inst_cream = (vcvtbds_inst*)inst_base->component; int ret; @@ -848,16 +819,15 @@ struct vcvtbff_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbff)(unsigned int inst, int index) -{ +static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbff)(unsigned int inst, int index) { VFP_DEBUG_UNTESTED(VCVTBFF); - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbff_inst)); - vcvtbff_inst *inst_cream = (vcvtbff_inst *)inst_base->component; + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbff_inst)); + vcvtbff_inst* inst_cream = (vcvtbff_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -866,12 +836,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbff)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VCVTBFF_INST: -{ +VCVTBFF_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vcvtbff_inst *inst_cream = (vcvtbff_inst *)inst_base->component; + vcvtbff_inst* inst_cream = (vcvtbff_inst*)inst_base->component; int ret; @@ -899,14 +868,13 @@ struct vcvtbfi_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbfi_inst)); - vcvtbfi_inst *inst_cream = (vcvtbfi_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbfi_inst)); + vcvtbfi_inst* inst_cream = (vcvtbfi_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->dp_operation = BIT(inst, 8); inst_cream->instr = inst; @@ -915,12 +883,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VCVTBFI_INST: -{ +VCVTBFI_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vcvtbfi_inst *inst_cream = (vcvtbfi_inst *)inst_base->component; + vcvtbfi_inst* inst_cream = (vcvtbfi_inst*)inst_base->component; int ret; @@ -955,29 +922,27 @@ struct vmovbrs_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrs)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrs_inst)); - vmovbrs_inst *inst_cream = (vmovbrs_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrs)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrs_inst)); + vmovbrs_inst* inst_cream = (vmovbrs_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->to_arm = BIT(inst, 20) == 1; - inst_cream->t = BITS(inst, 12, 15); - inst_cream->n = BIT(inst, 7) | BITS(inst, 16, 19)<<1; + inst_cream->t = BITS(inst, 12, 15); + inst_cream->n = BIT(inst, 7) | BITS(inst, 16, 19) << 1; return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VMOVBRS_INST: -{ +VMOVBRS_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vmovbrs_inst *inst_cream = (vmovbrs_inst *)inst_base->component; + vmovbrs_inst* inst_cream = (vmovbrs_inst*)inst_base->component; VMOVBRS(cpu, inst_cream->to_arm, inst_cream->t, inst_cream->n, &(cpu->Reg[inst_cream->t])); } @@ -999,24 +964,22 @@ struct vmsr_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmsr_inst)); - vmsr_inst *inst_cream = (vmsr_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmsr_inst)); + vmsr_inst* inst_cream = (vmsr_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->reg = BITS(inst, 16, 19); - inst_cream->Rt = BITS(inst, 12, 15); + inst_cream->Rt = BITS(inst, 12, 15); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VMSR_INST: -{ +VMSR_INST : { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { /* FIXME: special case for access to FPSID and FPEXC, VFP must be disabled , and in privileged mode */ @@ -1026,14 +989,11 @@ VMSR_INST: vmsr_inst* const inst_cream = (vmsr_inst*)inst_base->component; unsigned int reg = inst_cream->reg; - unsigned int rt = inst_cream->Rt; + unsigned int rt = inst_cream->Rt; - if (reg == 1) - { + if (reg == 1) { cpu->VFP[VFP_FPSCR] = cpu->Reg[rt]; - } - else if (cpu->InAPrivilegedMode()) - { + } else if (cpu->InAPrivilegedMode()) { if (reg == 8) cpu->VFP[VFP_FPEXC] = cpu->Reg[rt]; else if (reg == 9) @@ -1062,17 +1022,16 @@ struct vmovbrc_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrc_inst)); - vmovbrc_inst *inst_cream = (vmovbrc_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrc_inst)); + vmovbrc_inst* inst_cream = (vmovbrc_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; - inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4; - inst_cream->t = BITS(inst, 12, 15); + inst_cream->d = BITS(inst, 16, 19) | BIT(inst, 7) << 4; + inst_cream->t = BITS(inst, 12, 15); /* VFP variant of instruction */ inst_cream->esize = 32; inst_cream->index = BIT(inst, 21); @@ -1081,8 +1040,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VMOVBRC_INST: -{ +VMOVBRC_INST : { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; @@ -1108,24 +1066,22 @@ struct vmrs_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmrs_inst)); - vmrs_inst *inst_cream = (vmrs_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmrs_inst)); + vmrs_inst* inst_cream = (vmrs_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->reg = BITS(inst, 16, 19); - inst_cream->Rt = BITS(inst, 12, 15); + inst_cream->Rt = BITS(inst, 12, 15); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VMRS_INST: -{ +VMRS_INST : { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { /* FIXME: special case for access to FPSID and FPEXC, VFP must be disabled, and in privileged mode */ @@ -1135,36 +1091,25 @@ VMRS_INST: vmrs_inst* const inst_cream = (vmrs_inst*)inst_base->component; unsigned int reg = inst_cream->reg; - unsigned int rt = inst_cream->Rt; + unsigned int rt = inst_cream->Rt; if (reg == 1) // FPSCR { - if (rt != 15) - { + if (rt != 15) { cpu->Reg[rt] = cpu->VFP[VFP_FPSCR]; - } - else - { + } else { cpu->NFlag = (cpu->VFP[VFP_FPSCR] >> 31) & 1; cpu->ZFlag = (cpu->VFP[VFP_FPSCR] >> 30) & 1; cpu->CFlag = (cpu->VFP[VFP_FPSCR] >> 29) & 1; cpu->VFlag = (cpu->VFP[VFP_FPSCR] >> 28) & 1; } - } - else if (reg == 0) - { + } else if (reg == 0) { cpu->Reg[rt] = cpu->VFP[VFP_FPSID]; - } - else if (reg == 6) - { + } else if (reg == 6) { cpu->Reg[rt] = cpu->VFP[VFP_MVFR1]; - } - else if (reg == 7) - { + } else if (reg == 7) { cpu->Reg[rt] = cpu->VFP[VFP_MVFR0]; - } - else if (cpu->InAPrivilegedMode()) - { + } else if (cpu->InAPrivilegedMode()) { if (reg == 8) cpu->Reg[rt] = cpu->VFP[VFP_FPEXC]; else if (reg == 9) @@ -1193,17 +1138,16 @@ struct vmovbcr_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbcr_inst)); - vmovbcr_inst *inst_cream = (vmovbcr_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbcr_inst)); + vmovbcr_inst* inst_cream = (vmovbcr_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; - inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4; - inst_cream->t = BITS(inst, 12, 15); + inst_cream->d = BITS(inst, 16, 19) | BIT(inst, 7) << 4; + inst_cream->t = BITS(inst, 12, 15); /* VFP variant of instruction */ inst_cream->esize = 32; inst_cream->index = BIT(inst, 21); @@ -1212,12 +1156,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index) } #endif #ifdef VFP_INTERPRETER_IMPL -VMOVBCR_INST: -{ +VMOVBCR_INST : { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vmovbcr_inst* const inst_cream = (vmovbcr_inst*) inst_base->component; + vmovbcr_inst* const inst_cream = (vmovbcr_inst*)inst_base->component; cpu->Reg[inst_cream->t] = cpu->ExtReg[(2 * inst_cream->d) + inst_cream->index]; } @@ -1246,33 +1189,31 @@ struct vmovbrrss_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrss)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrss_inst)); - vmovbrrss_inst *inst_cream = (vmovbrrss_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrss)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrss_inst)); + vmovbrrss_inst* inst_cream = (vmovbrrss_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->to_arm = BIT(inst, 20) == 1; - inst_cream->t = BITS(inst, 12, 15); - inst_cream->t2 = BITS(inst, 16, 19); - inst_cream->m = BITS(inst, 0, 3)<<1|BIT(inst, 5); + inst_cream->t = BITS(inst, 12, 15); + inst_cream->t2 = BITS(inst, 16, 19); + inst_cream->m = BITS(inst, 0, 3) << 1 | BIT(inst, 5); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VMOVBRRSS_INST: -{ +VMOVBRRSS_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; vmovbrrss_inst* const inst_cream = (vmovbrrss_inst*)inst_base->component; VMOVBRRSS(cpu, inst_cream->to_arm, inst_cream->t, inst_cream->t2, inst_cream->m, - &cpu->Reg[inst_cream->t], &cpu->Reg[inst_cream->t2]); + &cpu->Reg[inst_cream->t], &cpu->Reg[inst_cream->t2]); } cpu->Reg[15] += cpu->GetInstructionSize(); INC_PC(sizeof(vmovbrrss_inst)); @@ -1294,33 +1235,31 @@ struct vmovbrrd_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrd)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrd_inst)); - vmovbrrd_inst *inst_cream = (vmovbrrd_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrd)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrd_inst)); + vmovbrrd_inst* inst_cream = (vmovbrrd_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->to_arm = BIT(inst, 20) == 1; - inst_cream->t = BITS(inst, 12, 15); - inst_cream->t2 = BITS(inst, 16, 19); - inst_cream->m = BIT(inst, 5)<<4 | BITS(inst, 0, 3); + inst_cream->t = BITS(inst, 12, 15); + inst_cream->t2 = BITS(inst, 16, 19); + inst_cream->m = BIT(inst, 5) << 4 | BITS(inst, 0, 3); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VMOVBRRD_INST: -{ +VMOVBRRD_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vmovbrrd_inst *inst_cream = (vmovbrrd_inst *)inst_base->component; + vmovbrrd_inst* inst_cream = (vmovbrrd_inst*)inst_base->component; VMOVBRRD(cpu, inst_cream->to_arm, inst_cream->t, inst_cream->t2, inst_cream->m, - &(cpu->Reg[inst_cream->t]), &(cpu->Reg[inst_cream->t2])); + &(cpu->Reg[inst_cream->t]), &(cpu->Reg[inst_cream->t2])); } cpu->Reg[15] += cpu->GetInstructionSize(); INC_PC(sizeof(vmovbrrd_inst)); @@ -1347,43 +1286,40 @@ struct vstr_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vstr)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstr_inst)); - vstr_inst *inst_cream = (vstr_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vstr)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vstr_inst)); + vstr_inst* inst_cream = (vstr_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->single = BIT(inst, 8) == 0; - inst_cream->add = BIT(inst, 23); - inst_cream->imm32 = BITS(inst, 0,7) << 2; - inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); - inst_cream->n = BITS(inst, 16, 19); + inst_cream->add = BIT(inst, 23); + inst_cream->imm32 = BITS(inst, 0, 7) << 2; + inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15) << 1 | BIT(inst, 22) + : BITS(inst, 12, 15) | BIT(inst, 22) << 4); + inst_cream->n = BITS(inst, 16, 19); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VSTR_INST: -{ +VSTR_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vstr_inst *inst_cream = (vstr_inst *)inst_base->component; + vstr_inst* inst_cream = (vstr_inst*)inst_base->component; - unsigned int base = (inst_cream->n == 15 ? (cpu->Reg[inst_cream->n] & 0xFFFFFFFC) + 8 : cpu->Reg[inst_cream->n]); + unsigned int base = (inst_cream->n == 15 ? (cpu->Reg[inst_cream->n] & 0xFFFFFFFC) + 8 + : cpu->Reg[inst_cream->n]); addr = (inst_cream->add ? base + inst_cream->imm32 : base - inst_cream->imm32); - if (inst_cream->single) - { + if (inst_cream->single) { cpu->WriteMemory32(addr, cpu->ExtReg[inst_cream->d]); - } - else - { - const u32 word1 = cpu->ExtReg[inst_cream->d*2+0]; - const u32 word2 = cpu->ExtReg[inst_cream->d*2+1]; + } else { + const u32 word1 = cpu->ExtReg[inst_cream->d * 2 + 0]; + const u32 word2 = cpu->ExtReg[inst_cream->d * 2 + 1]; if (cpu->InBigEndianMode()) { cpu->WriteMemory32(addr + 0, word2); @@ -1413,44 +1349,39 @@ struct vpush_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vpush)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpush_inst)); - vpush_inst *inst_cream = (vpush_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vpush)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vpush_inst)); + vpush_inst* inst_cream = (vpush_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; - inst_cream->single = BIT(inst, 8) == 0; - inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); - inst_cream->imm32 = BITS(inst, 0, 7)<<2; - inst_cream->regs = (inst_cream->single ? BITS(inst, 0, 7) : BITS(inst, 1, 7)); + inst_cream->single = BIT(inst, 8) == 0; + inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15) << 1 | BIT(inst, 22) + : BITS(inst, 12, 15) | BIT(inst, 22) << 4); + inst_cream->imm32 = BITS(inst, 0, 7) << 2; + inst_cream->regs = (inst_cream->single ? BITS(inst, 0, 7) : BITS(inst, 1, 7)); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VPUSH_INST: -{ +VPUSH_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vpush_inst *inst_cream = (vpush_inst *)inst_base->component; + vpush_inst* inst_cream = (vpush_inst*)inst_base->component; addr = cpu->Reg[R13] - inst_cream->imm32; - for (unsigned int i = 0; i < inst_cream->regs; i++) - { - if (inst_cream->single) - { - cpu->WriteMemory32(addr, cpu->ExtReg[inst_cream->d+i]); + for (unsigned int i = 0; i < inst_cream->regs; i++) { + if (inst_cream->single) { + cpu->WriteMemory32(addr, cpu->ExtReg[inst_cream->d + i]); addr += 4; - } - else - { - const u32 word1 = cpu->ExtReg[(inst_cream->d+i)*2+0]; - const u32 word2 = cpu->ExtReg[(inst_cream->d+i)*2+1]; + } else { + const u32 word1 = cpu->ExtReg[(inst_cream->d + i) * 2 + 0]; + const u32 word2 = cpu->ExtReg[(inst_cream->d + i) * 2 + 1]; if (cpu->InBigEndianMode()) { cpu->WriteMemory32(addr + 0, word2); @@ -1488,28 +1419,28 @@ struct vstm_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstm_inst)); - vstm_inst *inst_cream = (vstm_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vstm_inst)); + vstm_inst* inst_cream = (vstm_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->single = BIT(inst, 8) == 0; - inst_cream->add = BIT(inst, 23); - inst_cream->wback = BIT(inst, 21); - inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); - inst_cream->n = BITS(inst, 16, 19); - inst_cream->imm32 = BITS(inst, 0, 7)<<2; - inst_cream->regs = (inst_cream->single ? BITS(inst, 0, 7) : BITS(inst, 1, 7)); + inst_cream->add = BIT(inst, 23); + inst_cream->wback = BIT(inst, 21); + inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15) << 1 | BIT(inst, 22) + : BITS(inst, 12, 15) | BIT(inst, 22) << 4); + inst_cream->n = BITS(inst, 16, 19); + inst_cream->imm32 = BITS(inst, 0, 7) << 2; + inst_cream->regs = (inst_cream->single ? BITS(inst, 0, 7) : BITS(inst, 1, 7)); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VSTM_INST: /* encoding 1 */ +VSTM_INST : /* encoding 1 */ { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; @@ -1525,17 +1456,13 @@ VSTM_INST: /* encoding 1 */ if (inst_cream->add == 0) address -= inst_cream->imm32; - for (unsigned int i = 0; i < inst_cream->regs; i++) - { - if (inst_cream->single) - { - cpu->WriteMemory32(address, cpu->ExtReg[inst_cream->d+i]); + for (unsigned int i = 0; i < inst_cream->regs; i++) { + if (inst_cream->single) { + cpu->WriteMemory32(address, cpu->ExtReg[inst_cream->d + i]); address += 4; - } - else - { - const u32 word1 = cpu->ExtReg[(inst_cream->d+i)*2+0]; - const u32 word2 = cpu->ExtReg[(inst_cream->d+i)*2+1]; + } else { + const u32 word1 = cpu->ExtReg[(inst_cream->d + i) * 2 + 0]; + const u32 word2 = cpu->ExtReg[(inst_cream->d + i) * 2 + 1]; if (cpu->InBigEndianMode()) { cpu->WriteMemory32(address + 0, word2); @@ -1549,8 +1476,9 @@ VSTM_INST: /* encoding 1 */ } } if (inst_cream->wback) { - cpu->Reg[inst_cream->n] = (inst_cream->add ? cpu->Reg[inst_cream->n] + inst_cream->imm32 : - cpu->Reg[inst_cream->n] - inst_cream->imm32); + cpu->Reg[inst_cream->n] = + (inst_cream->add ? cpu->Reg[inst_cream->n] + inst_cream->imm32 + : cpu->Reg[inst_cream->n] - inst_cream->imm32); } } cpu->Reg[15] += 4; @@ -1573,51 +1501,46 @@ struct vpop_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vpop)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpop_inst)); - vpop_inst *inst_cream = (vpop_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vpop)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vpop_inst)); + vpop_inst* inst_cream = (vpop_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; - inst_cream->single = BIT(inst, 8) == 0; - inst_cream->d = (inst_cream->single ? (BITS(inst, 12, 15)<<1)|BIT(inst, 22) : BITS(inst, 12, 15)|(BIT(inst, 22)<<4)); - inst_cream->imm32 = BITS(inst, 0, 7)<<2; - inst_cream->regs = (inst_cream->single ? BITS(inst, 0, 7) : BITS(inst, 1, 7)); + inst_cream->single = BIT(inst, 8) == 0; + inst_cream->d = (inst_cream->single ? (BITS(inst, 12, 15) << 1) | BIT(inst, 22) + : BITS(inst, 12, 15) | (BIT(inst, 22) << 4)); + inst_cream->imm32 = BITS(inst, 0, 7) << 2; + inst_cream->regs = (inst_cream->single ? BITS(inst, 0, 7) : BITS(inst, 1, 7)); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VPOP_INST: -{ +VPOP_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vpop_inst *inst_cream = (vpop_inst *)inst_base->component; + vpop_inst* inst_cream = (vpop_inst*)inst_base->component; addr = cpu->Reg[R13]; - for (unsigned int i = 0; i < inst_cream->regs; i++) - { - if (inst_cream->single) - { - cpu->ExtReg[inst_cream->d+i] = cpu->ReadMemory32(addr); + for (unsigned int i = 0; i < inst_cream->regs; i++) { + if (inst_cream->single) { + cpu->ExtReg[inst_cream->d + i] = cpu->ReadMemory32(addr); addr += 4; - } - else - { + } else { const u32 word1 = cpu->ReadMemory32(addr + 0); const u32 word2 = cpu->ReadMemory32(addr + 4); if (cpu->InBigEndianMode()) { - cpu->ExtReg[(inst_cream->d+i)*2+0] = word2; - cpu->ExtReg[(inst_cream->d+i)*2+1] = word1; + cpu->ExtReg[(inst_cream->d + i) * 2 + 0] = word2; + cpu->ExtReg[(inst_cream->d + i) * 2 + 1] = word1; } else { - cpu->ExtReg[(inst_cream->d+i)*2+0] = word1; - cpu->ExtReg[(inst_cream->d+i)*2+1] = word2; + cpu->ExtReg[(inst_cream->d + i) * 2 + 0] = word1; + cpu->ExtReg[(inst_cream->d + i) * 2 + 1] = word2; } addr += 8; @@ -1632,7 +1555,6 @@ VPOP_INST: } #endif - /* ----------------------------------------------------------------------- */ /* VLDR */ /* cond 1101 UD01 Rn-- Vd-- 101X imm8 imm8 */ @@ -1646,50 +1568,47 @@ struct vldr_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vldr)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldr_inst)); - vldr_inst *inst_cream = (vldr_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vldr)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vldr_inst)); + vldr_inst* inst_cream = (vldr_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->single = BIT(inst, 8) == 0; - inst_cream->add = BIT(inst, 23); - inst_cream->imm32 = BITS(inst, 0,7) << 2; - inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); - inst_cream->n = BITS(inst, 16, 19); + inst_cream->add = BIT(inst, 23); + inst_cream->imm32 = BITS(inst, 0, 7) << 2; + inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15) << 1 | BIT(inst, 22) + : BITS(inst, 12, 15) | BIT(inst, 22) << 4); + inst_cream->n = BITS(inst, 16, 19); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VLDR_INST: -{ +VLDR_INST : { if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; - vldr_inst *inst_cream = (vldr_inst *)inst_base->component; + vldr_inst* inst_cream = (vldr_inst*)inst_base->component; - unsigned int base = (inst_cream->n == 15 ? (cpu->Reg[inst_cream->n] & 0xFFFFFFFC) + 8 : cpu->Reg[inst_cream->n]); + unsigned int base = (inst_cream->n == 15 ? (cpu->Reg[inst_cream->n] & 0xFFFFFFFC) + 8 + : cpu->Reg[inst_cream->n]); addr = (inst_cream->add ? base + inst_cream->imm32 : base - inst_cream->imm32); - if (inst_cream->single) - { + if (inst_cream->single) { cpu->ExtReg[inst_cream->d] = cpu->ReadMemory32(addr); - } - else - { + } else { const u32 word1 = cpu->ReadMemory32(addr + 0); const u32 word2 = cpu->ReadMemory32(addr + 4); if (cpu->InBigEndianMode()) { - cpu->ExtReg[inst_cream->d*2+0] = word2; - cpu->ExtReg[inst_cream->d*2+1] = word1; + cpu->ExtReg[inst_cream->d * 2 + 0] = word2; + cpu->ExtReg[inst_cream->d * 2 + 1] = word1; } else { - cpu->ExtReg[inst_cream->d*2+0] = word1; - cpu->ExtReg[inst_cream->d*2+1] = word2; + cpu->ExtReg[inst_cream->d * 2 + 0] = word1; + cpu->ExtReg[inst_cream->d * 2 + 1] = word2; } } } @@ -1715,29 +1634,28 @@ struct vldm_inst { }; #endif #ifdef VFP_INTERPRETER_TRANS -static ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index) -{ - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldm_inst)); - vldm_inst *inst_cream = (vldm_inst *)inst_base->component; +static ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index) { + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(vldm_inst)); + vldm_inst* inst_cream = (vldm_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = TransExtData::NON_BRANCH; + inst_base->idx = index; + inst_base->br = TransExtData::NON_BRANCH; inst_cream->single = BIT(inst, 8) == 0; - inst_cream->add = BIT(inst, 23); - inst_cream->wback = BIT(inst, 21); - inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); - inst_cream->n = BITS(inst, 16, 19); - inst_cream->imm32 = BITS(inst, 0, 7)<<2; - inst_cream->regs = (inst_cream->single ? BITS(inst, 0, 7) : BITS(inst, 1, 7)); + inst_cream->add = BIT(inst, 23); + inst_cream->wback = BIT(inst, 21); + inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15) << 1 | BIT(inst, 22) + : BITS(inst, 12, 15) | BIT(inst, 22) << 4); + inst_cream->n = BITS(inst, 16, 19); + inst_cream->imm32 = BITS(inst, 0, 7) << 2; + inst_cream->regs = (inst_cream->single ? BITS(inst, 0, 7) : BITS(inst, 1, 7)); return inst_base; } #endif #ifdef VFP_INTERPRETER_IMPL -VLDM_INST: -{ +VLDM_INST : { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { CHECK_VFP_ENABLED; @@ -1752,32 +1670,29 @@ VLDM_INST: if (inst_cream->add == 0) address -= inst_cream->imm32; - for (unsigned int i = 0; i < inst_cream->regs; i++) - { - if (inst_cream->single) - { - cpu->ExtReg[inst_cream->d+i] = cpu->ReadMemory32(address); + for (unsigned int i = 0; i < inst_cream->regs; i++) { + if (inst_cream->single) { + cpu->ExtReg[inst_cream->d + i] = cpu->ReadMemory32(address); address += 4; - } - else - { + } else { const u32 word1 = cpu->ReadMemory32(address + 0); const u32 word2 = cpu->ReadMemory32(address + 4); if (cpu->InBigEndianMode()) { - cpu->ExtReg[(inst_cream->d+i)*2+0] = word2; - cpu->ExtReg[(inst_cream->d+i)*2+1] = word1; + cpu->ExtReg[(inst_cream->d + i) * 2 + 0] = word2; + cpu->ExtReg[(inst_cream->d + i) * 2 + 1] = word1; } else { - cpu->ExtReg[(inst_cream->d+i)*2+0] = word1; - cpu->ExtReg[(inst_cream->d+i)*2+1] = word2; + cpu->ExtReg[(inst_cream->d + i) * 2 + 0] = word1; + cpu->ExtReg[(inst_cream->d + i) * 2 + 1] = word2; } address += 8; } } if (inst_cream->wback) { - cpu->Reg[inst_cream->n] = (inst_cream->add ? cpu->Reg[inst_cream->n] + inst_cream->imm32 : - cpu->Reg[inst_cream->n] - inst_cream->imm32); + cpu->Reg[inst_cream->n] = + (inst_cream->add ? cpu->Reg[inst_cream->n] + inst_cream->imm32 + : cpu->Reg[inst_cream->n] - inst_cream->imm32); } } cpu->Reg[15] += cpu->GetInstructionSize(); |