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author | Chin <chin.bimbo@gmail.com> | 2014-12-21 00:28:17 +0100 |
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committer | Chin <chin.bimbo@gmail.com> | 2014-12-21 16:58:55 +0100 |
commit | 0199a7d9ef26516779f73192dd41738ce4116c20 (patch) | |
tree | 1b1529ae3d9e4e8e3d47d96893571a2eeb9fa4a2 /src/core/arm | |
parent | Merge pull request #316 from yuriks/thread-handle (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_dec.h | 2 | ||||
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 12 | ||||
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_run.cpp | 1 |
3 files changed, 6 insertions, 9 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_dec.h b/src/core/arm/dyncom/arm_dyncom_dec.h index 19d94f369..70eb96e93 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.h +++ b/src/core/arm/dyncom/arm_dyncom_dec.h @@ -56,8 +56,6 @@ #define RN ((instr >> 16) & 0xF) /*xxxx xxxx xxxx xxxx xxxx xxxx xxxx 1111 */ #define RM (instr & 0xF) -#define BIT(n) ((instr >> (n)) & 1) -#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1)) /* CP15 registers */ #define OPCODE_1 BITS(21, 23) diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 84b4a38f0..085edb0ee 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3746,9 +3746,9 @@ unsigned InterpreterMainLoop(ARMul_State* state) #define INC_ICOUNTER cpu->icounter++; \ if(cpu->Reg[15] > 0xc0000000) \ cpu->kernel_icounter++; - //if (debug_function(core)) \ + /*if (debug_function(core)) \ if (core->check_int_flag) \ - goto END + goto END*/ //LOG_TRACE(Core_ARM11, "icounter is %llx pc is %x\n", cpu->icounter, cpu->Reg[15]) #else #define INC_ICOUNTER ; @@ -3969,18 +3969,18 @@ unsigned InterpreterMainLoop(ARMul_State* state) #define UPDATE_NFLAG(dst) (cpu->NFlag = BIT(dst, 31) ? 1 : 0) #define UPDATE_ZFLAG(dst) (cpu->ZFlag = dst ? 0 : 1) -// #define UPDATE_CFLAG(dst, lop, rop) (cpu->CFlag = ((ISNEG(lop) && ISPOS(rop)) || \ +/* #define UPDATE_CFLAG(dst, lop, rop) (cpu->CFlag = ((ISNEG(lop) && ISPOS(rop)) || \ (ISNEG(lop) && ISPOS(dst)) || \ - (ISPOS(rop) && ISPOS(dst)))) + (ISPOS(rop) && ISPOS(dst)))) */ #define UPDATE_CFLAG(dst, lop, rop) (cpu->CFlag = ((dst < lop) || (dst < rop))) #define UPDATE_CFLAG_CARRY_FROM_ADD(lop, rop, flag) (cpu->CFlag = (((uint64_t) lop + (uint64_t) rop + (uint64_t) flag) > 0xffffffff) ) #define UPDATE_CFLAG_NOT_BORROW_FROM_FLAG(lop, rop, flag) (cpu->CFlag = ((uint64_t) lop >= ((uint64_t) rop + (uint64_t) flag))) #define UPDATE_CFLAG_NOT_BORROW_FROM(lop, rop) (cpu->CFlag = (lop >= rop)) #define UPDATE_CFLAG_WITH_NOT(dst, lop, rop) (cpu->CFlag = !(dst < lop)) #define UPDATE_CFLAG_WITH_SC cpu->CFlag = cpu->shifter_carry_out -// #define UPDATE_CFLAG_WITH_NOT(dst, lop, rop) cpu->CFlag = !((ISNEG(lop) && ISPOS(rop)) || \ +/* #define UPDATE_CFLAG_WITH_NOT(dst, lop, rop) cpu->CFlag = !((ISNEG(lop) && ISPOS(rop)) || \ (ISNEG(lop) && ISPOS(dst)) || \ - (ISPOS(rop) && ISPOS(dst))) + (ISPOS(rop) && ISPOS(dst))) */ #define UPDATE_VFLAG(dst, lop, rop) (cpu->VFlag = (((lop < 0) && (rop < 0) && (dst >= 0)) || \ ((lop >= 0) && (rop) >= 0 && (dst < 0)))) #define UPDATE_VFLAG_WITH_NOT(dst, lop, rop) (cpu->VFlag = !(((lop < 0) && (rop < 0) && (dst >= 0)) || \ diff --git a/src/core/arm/dyncom/arm_dyncom_run.cpp b/src/core/arm/dyncom/arm_dyncom_run.cpp index a2026cbf3..b66b92cf5 100644 --- a/src/core/arm/dyncom/arm_dyncom_run.cpp +++ b/src/core/arm/dyncom/arm_dyncom_run.cpp @@ -29,7 +29,6 @@ void switch_mode(arm_core_t *core, uint32_t mode) { - uint32_t tmp1, tmp2; if (core->Mode == mode) { //Mode not changed. //printf("mode not changed\n"); |