diff options
| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-05-10 03:43:29 +0200 |
|---|---|---|
| committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:31 +0200 |
| commit | ad61b47f80b96436ef675abcf1123668d9c1180d (patch) | |
| tree | 555fb6be6058322eae22e7088e8fbc4a615f796d /src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp | |
| parent | glasm: Add fp min/max insts and fix store for fp64 on GLASM (diff) | |
| download | yuzu-ad61b47f80b96436ef675abcf1123668d9c1180d.tar yuzu-ad61b47f80b96436ef675abcf1123668d9c1180d.tar.gz yuzu-ad61b47f80b96436ef675abcf1123668d9c1180d.tar.bz2 yuzu-ad61b47f80b96436ef675abcf1123668d9c1180d.tar.lz yuzu-ad61b47f80b96436ef675abcf1123668d9c1180d.tar.xz yuzu-ad61b47f80b96436ef675abcf1123668d9c1180d.tar.zst yuzu-ad61b47f80b96436ef675abcf1123668d9c1180d.zip | |
Diffstat (limited to '')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp index c9386805a..40f48a091 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp @@ -141,14 +141,16 @@ void EmitUMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b) { void EmitSClamp32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value, ScalarS32 min, ScalarS32 max) { const Register ret{ctx.reg_alloc.Define(inst)}; - ctx.Add("MIN.S {}.x,{},{};", ret, max, value); - ctx.Add("MAX.S {}.x,{},{};", ret, ret, min); + ctx.Add("MIN.S {}.x,{},{};" + "MAX.S {}.x,{},{};", + ret, max, value, ret, ret, min); } void EmitUClamp32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 min, ScalarU32 max) { const Register ret{ctx.reg_alloc.Define(inst)}; - ctx.Add("MIN.U {}.x,{},{};", ret, max, value); - ctx.Add("MAX.U {}.x,{},{};", ret, ret, min); + ctx.Add("MIN.U {}.x,{},{};" + "MAX.U {}.x,{},{};", + ret, max, value, ret, ret, min); } void EmitSLessThan(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs) { |