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authorReinUsesLisp <reinuseslisp@airmail.cc>2021-05-14 09:48:46 +0200
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-23 03:51:31 +0200
commitbf5e48ffe4bd48ea681f2a01c8919c97125e88df (patch)
tree2127c2f01aa19b98672f1ac9f34395b9b0240b3e /src/shader_recompiler/backend/spirv/emit_spirv.cpp
parentglasm: Write result to scalar on integer comparison instructions (diff)
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Diffstat (limited to '')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index c22edfec2..7bf8c78de 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -468,7 +468,11 @@ Id EmitIdentity(EmitContext& ctx, const IR::Value& value) {
return id;
}
-void EmitBranchConditionRef(EmitContext&) {}
+void EmitDummyReference(EmitContext&) {}
+
+void EmitPhiMove(EmitContext&) {
+ throw LogicError("Unreachable instruction");
+}
void EmitGetZeroFromOp(EmitContext&) {
throw LogicError("Unreachable instruction");