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| author | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-03-14 07:23:56 +0100 |
|---|---|---|
| committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:23 +0200 |
| commit | 8d470c2e63c2dac334ccff2bcda9a0607ce76377 (patch) | |
| tree | e97594278b6f4877a2350550be4727b8c4934248 /src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp | |
| parent | shader: Fix rebase issue (diff) | |
| download | yuzu-8d470c2e63c2dac334ccff2bcda9a0607ce76377.tar yuzu-8d470c2e63c2dac334ccff2bcda9a0607ce76377.tar.gz yuzu-8d470c2e63c2dac334ccff2bcda9a0607ce76377.tar.bz2 yuzu-8d470c2e63c2dac334ccff2bcda9a0607ce76377.tar.lz yuzu-8d470c2e63c2dac334ccff2bcda9a0607ce76377.tar.xz yuzu-8d470c2e63c2dac334ccff2bcda9a0607ce76377.tar.zst yuzu-8d470c2e63c2dac334ccff2bcda9a0607ce76377.zip | |
Diffstat (limited to '')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp index a359c42fc..e635b1ffb 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp @@ -60,20 +60,20 @@ Id EmitFPFma64(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c) { return Decorate(ctx, inst, ctx.OpFma(ctx.F64[1], a, b, c)); } -void EmitFPMax32(EmitContext&) { - throw NotImplementedException("SPIR-V Instruction"); +Id EmitFPMax32(EmitContext& ctx, Id a, Id b) { + return ctx.OpFMax(ctx.F32[1], a, b); } -void EmitFPMax64(EmitContext&) { - throw NotImplementedException("SPIR-V Instruction"); +Id EmitFPMax64(EmitContext& ctx, Id a, Id b) { + return ctx.OpFMax(ctx.F64[1], a, b); } -void EmitFPMin32(EmitContext&) { - throw NotImplementedException("SPIR-V Instruction"); +Id EmitFPMin32(EmitContext& ctx, Id a, Id b) { + return ctx.OpFMin(ctx.F32[1], a, b); } -void EmitFPMin64(EmitContext&) { - throw NotImplementedException("SPIR-V Instruction"); +Id EmitFPMin64(EmitContext& ctx, Id a, Id b) { + return ctx.OpFMin(ctx.F64[1], a, b); } Id EmitFPMul16(EmitContext& ctx, IR::Inst* inst, Id a, Id b) { |