diff options
Diffstat (limited to '')
| -rw-r--r-- | src/core/arm/arm_interface.h | 46 |
1 files changed, 27 insertions, 19 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 7d62d030e..d5f2fa09a 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -5,10 +5,9 @@ #include <array> #include <span> +#include <string> #include <vector> -#include <dynarmic/interface/halt_reason.h> - #include "common/common_funcs.h" #include "common/common_types.h" #include "core/hardware_properties.h" @@ -29,6 +28,22 @@ class CPUInterruptHandler; using WatchpointArray = std::array<Kernel::DebugWatchpoint, Core::Hardware::NUM_WATCHPOINTS>; +// NOTE: these values match the HaltReason enum in Dynarmic +enum class HaltReason : u64 { + StepThread = 0x00000001, + DataAbort = 0x00000004, + BreakLoop = 0x02000000, + SupervisorCall = 0x04000000, + InstructionBreakpoint = 0x08000000, + PrefetchAbort = 0x20000000, +}; +DECLARE_ENUM_FLAG_OPERATORS(HaltReason); + +enum class Architecture { + Aarch32, + Aarch64, +}; + /// Generic ARMv8 CPU interface class ARM_Interface { public: @@ -77,7 +92,7 @@ public: * @param addr Start address of the cache range to clear * @param size Size of the cache range to clear, starting at addr */ - virtual void InvalidateCacheRange(VAddr addr, std::size_t size) = 0; + virtual void InvalidateCacheRange(u64 addr, std::size_t size) = 0; /** * Notifies CPU emulation that the current page table has changed. @@ -148,9 +163,9 @@ public: */ virtual void SetPSTATE(u32 pstate) = 0; - virtual VAddr GetTlsAddress() const = 0; + virtual u64 GetTlsAddress() const = 0; - virtual void SetTlsAddress(VAddr address) = 0; + virtual void SetTlsAddress(u64 address) = 0; /** * Gets the value within the TPIDR_EL0 (read/write software thread ID) register. @@ -166,8 +181,9 @@ public: */ virtual void SetTPIDR_EL0(u64 value) = 0; - virtual void SaveContext(ThreadContext32& ctx) = 0; - virtual void SaveContext(ThreadContext64& ctx) = 0; + virtual Architecture GetArchitecture() const = 0; + virtual void SaveContext(ThreadContext32& ctx) const = 0; + virtual void SaveContext(ThreadContext64& ctx) const = 0; virtual void LoadContext(const ThreadContext32& ctx) = 0; virtual void LoadContext(const ThreadContext64& ctx) = 0; void LoadWatchpointArray(const WatchpointArray& wp); @@ -194,17 +210,9 @@ public: static std::vector<BacktraceEntry> GetBacktraceFromContext(System& system, const ThreadContext64& ctx); - virtual std::vector<BacktraceEntry> GetBacktrace() const = 0; - + std::vector<BacktraceEntry> GetBacktrace() const; void LogBacktrace() const; - static constexpr Dynarmic::HaltReason step_thread = Dynarmic::HaltReason::Step; - static constexpr Dynarmic::HaltReason break_loop = Dynarmic::HaltReason::UserDefined2; - static constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3; - static constexpr Dynarmic::HaltReason breakpoint = Dynarmic::HaltReason::UserDefined4; - static constexpr Dynarmic::HaltReason watchpoint = Dynarmic::HaltReason::MemoryAbort; - static constexpr Dynarmic::HaltReason no_execute = Dynarmic::HaltReason::UserDefined6; - protected: /// System context that this ARM interface is running under. System& system; @@ -213,10 +221,10 @@ protected: static void SymbolicateBacktrace(Core::System& system, std::vector<BacktraceEntry>& out); const Kernel::DebugWatchpoint* MatchingWatchpoint( - VAddr addr, u64 size, Kernel::DebugWatchpointType access_type) const; + u64 addr, u64 size, Kernel::DebugWatchpointType access_type) const; - virtual Dynarmic::HaltReason RunJit() = 0; - virtual Dynarmic::HaltReason StepJit() = 0; + virtual HaltReason RunJit() = 0; + virtual HaltReason StepJit() = 0; virtual u32 GetSvcNumber() const = 0; virtual const Kernel::DebugWatchpoint* HaltedWatchpoint() const = 0; virtual void RewindBreakpointInstruction() = 0; |