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-rw-r--r--src/core/arm/dynarmic/arm_dynarmic_32.cpp97
1 files changed, 30 insertions, 67 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
index 2a7570073..5acf9008d 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
@@ -5,15 +5,15 @@
#include <memory>
#include <dynarmic/interface/A32/a32.h>
#include <dynarmic/interface/A32/config.h>
-#include <dynarmic/interface/A32/context.h>
#include "common/assert.h"
#include "common/literals.h"
#include "common/logging/log.h"
#include "common/page_table.h"
#include "common/settings.h"
+#include "core/arm/dynarmic/arm_dynarmic.h"
#include "core/arm/dynarmic/arm_dynarmic_32.h"
-#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
-#include "core/arm/dynarmic/arm_exclusive_monitor.h"
+#include "core/arm/dynarmic/dynarmic_cp15.h"
+#include "core/arm/dynarmic/dynarmic_exclusive_monitor.h"
#include "core/core.h"
#include "core/core_timing.h"
#include "core/debugger/debugger.h"
@@ -28,8 +28,8 @@ using namespace Common::Literals;
class DynarmicCallbacks32 : public Dynarmic::A32::UserCallbacks {
public:
explicit DynarmicCallbacks32(ARM_Dynarmic_32& parent_)
- : parent{parent_},
- memory(parent.system.Memory()), debugger_enabled{parent.system.DebuggerEnabled()},
+ : parent{parent_}, memory(parent.system.ApplicationMemory()),
+ debugger_enabled{parent.system.DebuggerEnabled()},
check_memory_access{debugger_enabled ||
!Settings::values.cpuopt_ignore_memory_aborts.GetValue()} {}
@@ -105,11 +105,11 @@ public:
switch (exception) {
case Dynarmic::A32::Exception::NoExecuteFault:
LOG_CRITICAL(Core_ARM, "Cannot execute instruction at unmapped address {:#08x}", pc);
- ReturnException(pc, ARM_Interface::no_execute);
+ ReturnException(pc, PrefetchAbort);
return;
default:
if (debugger_enabled) {
- ReturnException(pc, ARM_Interface::breakpoint);
+ ReturnException(pc, InstructionBreakpoint);
return;
}
@@ -122,7 +122,7 @@ public:
void CallSVC(u32 swi) override {
parent.svc_swi = swi;
- parent.jit.load()->HaltExecution(ARM_Interface::svc_call);
+ parent.jit.load()->HaltExecution(SupervisorCall);
}
void AddTicks(u64 ticks) override {
@@ -155,7 +155,7 @@ public:
return std::max<s64>(parent.system.CoreTiming().GetDowncount(), 0);
}
- bool CheckMemoryAccess(VAddr addr, u64 size, Kernel::DebugWatchpointType type) {
+ bool CheckMemoryAccess(u64 addr, u64 size, Kernel::DebugWatchpointType type) {
if (!check_memory_access) {
return true;
}
@@ -163,7 +163,7 @@ public:
if (!memory.IsValidVirtualAddressRange(addr, size)) {
LOG_CRITICAL(Core_ARM, "Stopping execution due to unmapped memory access at {:#x}",
addr);
- parent.jit.load()->HaltExecution(ARM_Interface::no_execute);
+ parent.jit.load()->HaltExecution(PrefetchAbort);
return false;
}
@@ -174,7 +174,7 @@ public:
const auto match{parent.MatchingWatchpoint(addr, size, type)};
if (match) {
parent.halted_watchpoint = match;
- parent.jit.load()->HaltExecution(ARM_Interface::watchpoint);
+ parent.jit.load()->HaltExecution(DataAbort);
return false;
}
@@ -330,12 +330,12 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
return std::make_unique<Dynarmic::A32::Jit>(config);
}
-Dynarmic::HaltReason ARM_Dynarmic_32::RunJit() {
- return jit.load()->Run();
+HaltReason ARM_Dynarmic_32::RunJit() {
+ return TranslateHaltReason(jit.load()->Run());
}
-Dynarmic::HaltReason ARM_Dynarmic_32::StepJit() {
- return jit.load()->Step();
+HaltReason ARM_Dynarmic_32::StepJit() {
+ return TranslateHaltReason(jit.load()->Step());
}
u32 ARM_Dynarmic_32::GetSvcNumber() const {
@@ -397,7 +397,7 @@ u64 ARM_Dynarmic_32::GetTlsAddress() const {
return cp15->uro;
}
-void ARM_Dynarmic_32::SetTlsAddress(VAddr address) {
+void ARM_Dynarmic_32::SetTlsAddress(u64 address) {
cp15->uro = static_cast<u32>(address);
}
@@ -409,37 +409,35 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) {
cp15->uprw = static_cast<u32>(value);
}
-void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) {
- Dynarmic::A32::Context context;
- jit.load()->SaveContext(context);
- ctx.cpu_registers = context.Regs();
- ctx.extension_registers = context.ExtRegs();
- ctx.cpsr = context.Cpsr();
- ctx.fpscr = context.Fpscr();
+void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) const {
+ Dynarmic::A32::Jit* j = jit.load();
+ ctx.cpu_registers = j->Regs();
+ ctx.extension_registers = j->ExtRegs();
+ ctx.cpsr = j->Cpsr();
+ ctx.fpscr = j->Fpscr();
}
void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
- Dynarmic::A32::Context context;
- context.Regs() = ctx.cpu_registers;
- context.ExtRegs() = ctx.extension_registers;
- context.SetCpsr(ctx.cpsr);
- context.SetFpscr(ctx.fpscr);
- jit.load()->LoadContext(context);
+ Dynarmic::A32::Jit* j = jit.load();
+ j->Regs() = ctx.cpu_registers;
+ j->ExtRegs() = ctx.extension_registers;
+ j->SetCpsr(ctx.cpsr);
+ j->SetFpscr(ctx.fpscr);
}
void ARM_Dynarmic_32::SignalInterrupt() {
- jit.load()->HaltExecution(break_loop);
+ jit.load()->HaltExecution(BreakLoop);
}
void ARM_Dynarmic_32::ClearInterrupt() {
- jit.load()->ClearHalt(break_loop);
+ jit.load()->ClearHalt(BreakLoop);
}
void ARM_Dynarmic_32::ClearInstructionCache() {
jit.load()->ClearCache();
}
-void ARM_Dynarmic_32::InvalidateCacheRange(VAddr addr, std::size_t size) {
+void ARM_Dynarmic_32::InvalidateCacheRange(u64 addr, std::size_t size) {
jit.load()->InvalidateCacheRange(static_cast<u32>(addr), size);
}
@@ -465,39 +463,4 @@ void ARM_Dynarmic_32::PageTableChanged(Common::PageTable& page_table,
jit_cache.emplace(key, std::move(new_jit));
}
-std::vector<ARM_Interface::BacktraceEntry> ARM_Dynarmic_32::GetBacktrace(Core::System& system,
- u64 fp, u64 lr, u64 pc) {
- std::vector<BacktraceEntry> out;
- auto& memory = system.Memory();
-
- out.push_back({"", 0, pc, 0, ""});
-
- // fp (= r11) points to the last frame record.
- // Frame records are two words long:
- // fp+0 : pointer to previous frame record
- // fp+4 : value of lr for frame
- for (size_t i = 0; i < 256; i++) {
- out.push_back({"", 0, lr, 0, ""});
- if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 8)) {
- break;
- }
- lr = memory.Read32(fp + 4);
- fp = memory.Read32(fp);
- }
-
- SymbolicateBacktrace(system, out);
-
- return out;
-}
-
-std::vector<ARM_Interface::BacktraceEntry> ARM_Dynarmic_32::GetBacktraceFromContext(
- System& system, const ThreadContext32& ctx) {
- const auto& reg = ctx.cpu_registers;
- return GetBacktrace(system, reg[11], reg[14], reg[15]);
-}
-
-std::vector<ARM_Interface::BacktraceEntry> ARM_Dynarmic_32::GetBacktrace() const {
- return GetBacktrace(system, GetReg(11), GetReg(14), GetReg(15));
-}
-
} // namespace Core
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-30 18:36:21 +0200