diff options
Diffstat (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp')
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_32.cpp | 35 |
1 files changed, 16 insertions, 19 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 2a7570073..dfdcbe35a 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -5,7 +5,6 @@ #include <memory> #include <dynarmic/interface/A32/a32.h> #include <dynarmic/interface/A32/config.h> -#include <dynarmic/interface/A32/context.h> #include "common/assert.h" #include "common/literals.h" #include "common/logging/log.h" @@ -28,8 +27,8 @@ using namespace Common::Literals; class DynarmicCallbacks32 : public Dynarmic::A32::UserCallbacks { public: explicit DynarmicCallbacks32(ARM_Dynarmic_32& parent_) - : parent{parent_}, - memory(parent.system.Memory()), debugger_enabled{parent.system.DebuggerEnabled()}, + : parent{parent_}, memory(parent.system.ApplicationMemory()), + debugger_enabled{parent.system.DebuggerEnabled()}, check_memory_access{debugger_enabled || !Settings::values.cpuopt_ignore_memory_aborts.GetValue()} {} @@ -155,7 +154,7 @@ public: return std::max<s64>(parent.system.CoreTiming().GetDowncount(), 0); } - bool CheckMemoryAccess(VAddr addr, u64 size, Kernel::DebugWatchpointType type) { + bool CheckMemoryAccess(u64 addr, u64 size, Kernel::DebugWatchpointType type) { if (!check_memory_access) { return true; } @@ -397,7 +396,7 @@ u64 ARM_Dynarmic_32::GetTlsAddress() const { return cp15->uro; } -void ARM_Dynarmic_32::SetTlsAddress(VAddr address) { +void ARM_Dynarmic_32::SetTlsAddress(u64 address) { cp15->uro = static_cast<u32>(address); } @@ -410,21 +409,19 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) { } void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) { - Dynarmic::A32::Context context; - jit.load()->SaveContext(context); - ctx.cpu_registers = context.Regs(); - ctx.extension_registers = context.ExtRegs(); - ctx.cpsr = context.Cpsr(); - ctx.fpscr = context.Fpscr(); + Dynarmic::A32::Jit* j = jit.load(); + ctx.cpu_registers = j->Regs(); + ctx.extension_registers = j->ExtRegs(); + ctx.cpsr = j->Cpsr(); + ctx.fpscr = j->Fpscr(); } void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) { - Dynarmic::A32::Context context; - context.Regs() = ctx.cpu_registers; - context.ExtRegs() = ctx.extension_registers; - context.SetCpsr(ctx.cpsr); - context.SetFpscr(ctx.fpscr); - jit.load()->LoadContext(context); + Dynarmic::A32::Jit* j = jit.load(); + j->Regs() = ctx.cpu_registers; + j->ExtRegs() = ctx.extension_registers; + j->SetCpsr(ctx.cpsr); + j->SetFpscr(ctx.fpscr); } void ARM_Dynarmic_32::SignalInterrupt() { @@ -439,7 +436,7 @@ void ARM_Dynarmic_32::ClearInstructionCache() { jit.load()->ClearCache(); } -void ARM_Dynarmic_32::InvalidateCacheRange(VAddr addr, std::size_t size) { +void ARM_Dynarmic_32::InvalidateCacheRange(u64 addr, std::size_t size) { jit.load()->InvalidateCacheRange(static_cast<u32>(addr), size); } @@ -468,7 +465,7 @@ void ARM_Dynarmic_32::PageTableChanged(Common::PageTable& page_table, std::vector<ARM_Interface::BacktraceEntry> ARM_Dynarmic_32::GetBacktrace(Core::System& system, u64 fp, u64 lr, u64 pc) { std::vector<BacktraceEntry> out; - auto& memory = system.Memory(); + auto& memory = system.ApplicationMemory(); out.push_back({"", 0, pc, 0, ""}); |