diff options
Diffstat (limited to '')
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_64.cpp | 33 |
1 files changed, 16 insertions, 17 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp index 1b1334598..d4c67eafd 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp @@ -15,6 +15,7 @@ #include "core/arm/dynarmic/arm_exclusive_monitor.h" #include "core/core.h" #include "core/core_timing.h" +#include "core/debugger/debugger.h" #include "core/hardware_properties.h" #include "core/hle/kernel/k_process.h" #include "core/hle/kernel/svc.h" @@ -25,9 +26,6 @@ namespace Core { using Vector = Dynarmic::A64::Vector; using namespace Common::Literals; -constexpr Dynarmic::HaltReason break_loop = Dynarmic::HaltReason::UserDefined2; -constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3; - class DynarmicCallbacks64 : public Dynarmic::A64::UserCallbacks { public: explicit DynarmicCallbacks64(ARM_Dynarmic_64& parent_) @@ -119,8 +117,13 @@ public: case Dynarmic::A64::Exception::SendEventLocal: case Dynarmic::A64::Exception::Yield: return; - case Dynarmic::A64::Exception::Breakpoint: default: + if (parent.system.DebuggerEnabled()) { + parent.jit.load()->SetPC(pc); + parent.jit.load()->HaltExecution(ARM_Interface::breakpoint); + return; + } + parent.LogBacktrace(); ASSERT_MSG(false, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})", static_cast<std::size_t>(exception), pc, MemoryReadCode(pc)); @@ -129,7 +132,7 @@ public: void CallSVC(u32 swi) override { parent.svc_swi = swi; - parent.jit.load()->HaltExecution(svc_call); + parent.jit.load()->HaltExecution(ARM_Interface::svc_call); } void AddTicks(u64 ticks) override { @@ -293,20 +296,16 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable* return std::make_shared<Dynarmic::A64::Jit>(config); } -void ARM_Dynarmic_64::Run() { - while (true) { - const auto hr = jit.load()->Run(); - if (Has(hr, svc_call)) { - Kernel::Svc::Call(system, svc_swi); - } - if (Has(hr, break_loop) || !uses_wall_clock) { - break; - } - } +Dynarmic::HaltReason ARM_Dynarmic_64::RunJit() { + return jit.load()->Run(); +} + +Dynarmic::HaltReason ARM_Dynarmic_64::StepJit() { + return jit.load()->Step(); } -void ARM_Dynarmic_64::Step() { - jit.load()->Step(); +u32 ARM_Dynarmic_64::GetSvcNumber() const { + return svc_swi; } ARM_Dynarmic_64::ARM_Dynarmic_64(System& system_, CPUInterrupts& interrupt_handlers_, |