diff options
Diffstat (limited to 'src/core/arm/dynarmic/arm_dynarmic_64.cpp')
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_64.cpp | 57 |
1 files changed, 33 insertions, 24 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp index 157051d69..63193dcb1 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp @@ -4,8 +4,8 @@ #include <cinttypes> #include <memory> -#include <dynarmic/A64/a64.h> -#include <dynarmic/A64/config.h> +#include <dynarmic/interface/A64/a64.h> +#include <dynarmic/interface/A64/config.h> #include "common/assert.h" #include "common/logging/log.h" #include "common/page_table.h" @@ -27,57 +27,56 @@ using Vector = Dynarmic::A64::Vector; class DynarmicCallbacks64 : public Dynarmic::A64::UserCallbacks { public: - explicit DynarmicCallbacks64(ARM_Dynarmic_64& parent_) : parent{parent_} {} + explicit DynarmicCallbacks64(ARM_Dynarmic_64& parent_) + : parent{parent_}, memory(parent.system.Memory()) {} u8 MemoryRead8(u64 vaddr) override { - return parent.system.Memory().Read8(vaddr); + return memory.Read8(vaddr); } u16 MemoryRead16(u64 vaddr) override { - return parent.system.Memory().Read16(vaddr); + return memory.Read16(vaddr); } u32 MemoryRead32(u64 vaddr) override { - return parent.system.Memory().Read32(vaddr); + return memory.Read32(vaddr); } u64 MemoryRead64(u64 vaddr) override { - return parent.system.Memory().Read64(vaddr); + return memory.Read64(vaddr); } Vector MemoryRead128(u64 vaddr) override { - auto& memory = parent.system.Memory(); return {memory.Read64(vaddr), memory.Read64(vaddr + 8)}; } void MemoryWrite8(u64 vaddr, u8 value) override { - parent.system.Memory().Write8(vaddr, value); + memory.Write8(vaddr, value); } void MemoryWrite16(u64 vaddr, u16 value) override { - parent.system.Memory().Write16(vaddr, value); + memory.Write16(vaddr, value); } void MemoryWrite32(u64 vaddr, u32 value) override { - parent.system.Memory().Write32(vaddr, value); + memory.Write32(vaddr, value); } void MemoryWrite64(u64 vaddr, u64 value) override { - parent.system.Memory().Write64(vaddr, value); + memory.Write64(vaddr, value); } void MemoryWrite128(u64 vaddr, Vector value) override { - auto& memory = parent.system.Memory(); memory.Write64(vaddr, value[0]); memory.Write64(vaddr + 8, value[1]); } bool MemoryWriteExclusive8(u64 vaddr, std::uint8_t value, std::uint8_t expected) override { - return parent.system.Memory().WriteExclusive8(vaddr, value, expected); + return memory.WriteExclusive8(vaddr, value, expected); } bool MemoryWriteExclusive16(u64 vaddr, std::uint16_t value, std::uint16_t expected) override { - return parent.system.Memory().WriteExclusive16(vaddr, value, expected); + return memory.WriteExclusive16(vaddr, value, expected); } bool MemoryWriteExclusive32(u64 vaddr, std::uint32_t value, std::uint32_t expected) override { - return parent.system.Memory().WriteExclusive32(vaddr, value, expected); + return memory.WriteExclusive32(vaddr, value, expected); } bool MemoryWriteExclusive64(u64 vaddr, std::uint64_t value, std::uint64_t expected) override { - return parent.system.Memory().WriteExclusive64(vaddr, value, expected); + return memory.WriteExclusive64(vaddr, value, expected); } bool MemoryWriteExclusive128(u64 vaddr, Vector value, Vector expected) override { - return parent.system.Memory().WriteExclusive128(vaddr, value, expected); + return memory.WriteExclusive128(vaddr, value, expected); } void InterpreterFallback(u64 pc, std::size_t num_instructions) override { @@ -102,7 +101,9 @@ public: } void CallSVC(u32 swi) override { - Kernel::Svc::Call(parent.system, swi); + parent.svc_called = true; + parent.svc_swi = swi; + parent.jit->HaltExecution(); } void AddTicks(u64 ticks) override { @@ -137,6 +138,7 @@ public: } ARM_Dynarmic_64& parent; + Core::Memory::Memory& memory; u64 tpidrro_el0 = 0; u64 tpidr_el0 = 0; static constexpr u64 minimum_run_cycles = 1000U; @@ -227,11 +229,17 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable* } void ARM_Dynarmic_64::Run() { - jit->Run(); -} - -void ARM_Dynarmic_64::ExceptionalExit() { - jit->ExceptionalExit(); + while (true) { + jit->Run(); + if (!svc_called) { + break; + } + svc_called = false; + Kernel::Svc::Call(system, svc_swi); + if (shutdown) { + break; + } + } } void ARM_Dynarmic_64::Step() { @@ -320,6 +328,7 @@ void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) { void ARM_Dynarmic_64::PrepareReschedule() { jit->HaltExecution(); + shutdown = true; } void ARM_Dynarmic_64::ClearInstructionCache() { |