diff options
Diffstat (limited to 'src/core/arm/dynarmic/arm_dynarmic_64.cpp')
| -rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_64.cpp | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp index aa74fce4d..24107f9f6 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp @@ -93,17 +93,19 @@ public: static constexpr u64 ICACHE_LINE_SIZE = 64; const u64 cache_line_start = value & ~(ICACHE_LINE_SIZE - 1); - parent.InvalidateCacheRange(cache_line_start, ICACHE_LINE_SIZE); + parent.system.InvalidateCpuInstructionCacheRange(cache_line_start, ICACHE_LINE_SIZE); break; } case Dynarmic::A64::InstructionCacheOperation::InvalidateAllToPoU: - parent.ClearInstructionCache(); + parent.system.InvalidateCpuInstructionCaches(); break; case Dynarmic::A64::InstructionCacheOperation::InvalidateAllToPoUInnerSharable: default: LOG_DEBUG(Core_ARM, "Unprocesseed instruction cache operation: {}", op); break; } + + parent.jit->HaltExecution(); } void ExceptionRaised(u64 pc, Dynarmic::A64::Exception exception) override { @@ -208,8 +210,8 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable* config.wall_clock_cntpct = uses_wall_clock; // Code cache size - config.code_cache_size = 128_MiB; - config.far_code_offset = 100_MiB; + config.code_cache_size = 512_MiB; + config.far_code_offset = 400_MiB; // Safe optimizations if (Settings::values.cpu_debug_mode) { |