diff options
Diffstat (limited to 'src/core/arm/dyncom/arm_dyncom_dec.cpp')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_dec.cpp | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_dec.cpp b/src/core/arm/dyncom/arm_dyncom_dec.cpp index 6dbc92b91..64dcaae08 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.cpp +++ b/src/core/arm/dyncom/arm_dyncom_dec.cpp @@ -430,12 +430,15 @@ ARMDecodeStatus DecodeARMInstruction(u32 instr, s32* idx) { continue; while (n) { - if (arm_instruction[i].content[base + 1] == 31 && arm_instruction[i].content[base] == 0) { + if (arm_instruction[i].content[base + 1] == 31 && + arm_instruction[i].content[base] == 0) { // clrex if (instr != arm_instruction[i].content[base + 2]) { break; } - } else if (BITS(instr, arm_instruction[i].content[base], arm_instruction[i].content[base + 1]) != arm_instruction[i].content[base + 2]) { + } else if (BITS(instr, arm_instruction[i].content[base], + arm_instruction[i].content[base + 1]) != + arm_instruction[i].content[base + 2]) { break; } base += 3; @@ -451,7 +454,9 @@ ARMDecodeStatus DecodeARMInstruction(u32 instr, s32* idx) { if (n != 0) { base = 0; while (n) { - if (BITS(instr, arm_exclusion_code[i].content[base], arm_exclusion_code[i].content[base + 1]) != arm_exclusion_code[i].content[base + 2]) { + if (BITS(instr, arm_exclusion_code[i].content[base], + arm_exclusion_code[i].content[base + 1]) != + arm_exclusion_code[i].content[base + 2]) { break; } base += 3; |