diff options
Diffstat (limited to 'src/core/arm')
-rw-r--r-- | src/core/arm/arm_interface.h | 7 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.cpp | 10 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.h | 2 | ||||
-rw-r--r-- | src/core/arm/unicorn/arm_unicorn.cpp | 14 | ||||
-rw-r--r-- | src/core/arm/unicorn/arm_unicorn.h | 2 |
5 files changed, 26 insertions, 9 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 8416e73b0..b0d7ced7f 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -20,9 +20,6 @@ public: u64 cpsr; std::array<u128, 32> fpu_registers; u64 fpscr; - - // TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT - VAddr tls_address; }; /// Runs the CPU until an event happens @@ -104,6 +101,10 @@ public: virtual void SetTlsAddress(VAddr address) = 0; + virtual u64 GetTPIDR_EL0() const = 0; + + virtual void SetTPIDR_EL0(u64 value) = 0; + /** * Saves the current CPU context * @param ctx Thread context to save diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 3572ee7b9..5d7efc9b6 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp @@ -196,6 +196,14 @@ void ARM_Dynarmic::SetTlsAddress(u64 address) { cb->tpidrro_el0 = address; } +u64 ARM_Dynarmic::GetTPIDR_EL0() const { + return cb->tpidr_el0; +} + +void ARM_Dynarmic::SetTPIDR_EL0(u64 value) { + cb->tpidr_el0 = value; +} + void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) { ctx.cpu_registers = jit->GetRegisters(); ctx.sp = jit->GetSP(); @@ -203,7 +211,6 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) { ctx.cpsr = jit->GetPstate(); ctx.fpu_registers = jit->GetVectors(); ctx.fpscr = jit->GetFpcr(); - ctx.tls_address = cb->tpidrro_el0; } void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { @@ -213,7 +220,6 @@ void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { jit->SetPstate(static_cast<u32>(ctx.cpsr)); jit->SetVectors(ctx.fpu_registers); jit->SetFpcr(static_cast<u32>(ctx.fpscr)); - cb->tpidrro_el0 = ctx.tls_address; } void ARM_Dynarmic::PrepareReschedule() { diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h index ed724c3f1..a9891ac4f 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.h +++ b/src/core/arm/dynarmic/arm_dynarmic.h @@ -34,6 +34,8 @@ public: void SetCPSR(u32 cpsr) override; VAddr GetTlsAddress() const override; void SetTlsAddress(VAddr address) override; + void SetTPIDR_EL0(u64 value) override; + u64 GetTPIDR_EL0() const override; void SaveContext(ThreadContext& ctx) override; void LoadContext(const ThreadContext& ctx) override; diff --git a/src/core/arm/unicorn/arm_unicorn.cpp b/src/core/arm/unicorn/arm_unicorn.cpp index d2d699e9b..4c11f35a4 100644 --- a/src/core/arm/unicorn/arm_unicorn.cpp +++ b/src/core/arm/unicorn/arm_unicorn.cpp @@ -169,6 +169,16 @@ void ARM_Unicorn::SetTlsAddress(VAddr base) { CHECKED(uc_reg_write(uc, UC_ARM64_REG_TPIDRRO_EL0, &base)); } +u64 ARM_Unicorn::GetTPIDR_EL0() const { + u64 value{}; + CHECKED(uc_reg_read(uc, UC_ARM64_REG_TPIDR_EL0, &value)); + return value; +} + +void ARM_Unicorn::SetTPIDR_EL0(u64 value) { + CHECKED(uc_reg_write(uc, UC_ARM64_REG_TPIDR_EL0, &value)); +} + void ARM_Unicorn::Run() { if (GDBStub::IsServerEnabled()) { ExecuteInstructions(std::max(4000000, 0)); @@ -220,8 +230,6 @@ void ARM_Unicorn::SaveContext(ARM_Interface::ThreadContext& ctx) { CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31)); - ctx.tls_address = GetTlsAddress(); - for (int i = 0; i < 32; ++i) { uregs[i] = UC_ARM64_REG_Q0 + i; tregs[i] = &ctx.fpu_registers[i]; @@ -249,8 +257,6 @@ void ARM_Unicorn::LoadContext(const ARM_Interface::ThreadContext& ctx) { CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31)); - SetTlsAddress(ctx.tls_address); - for (auto i = 0; i < 32; ++i) { uregs[i] = UC_ARM64_REG_Q0 + i; tregs[i] = (void*)&ctx.fpu_registers[i]; diff --git a/src/core/arm/unicorn/arm_unicorn.h b/src/core/arm/unicorn/arm_unicorn.h index a78a0acf2..af7943352 100644 --- a/src/core/arm/unicorn/arm_unicorn.h +++ b/src/core/arm/unicorn/arm_unicorn.h @@ -28,6 +28,8 @@ public: void SetCPSR(u32 cpsr) override; VAddr GetTlsAddress() const override; void SetTlsAddress(VAddr address) override; + void SetTPIDR_EL0(u64 value) override; + u64 GetTPIDR_EL0() const override; void SaveContext(ThreadContext& ctx) override; void LoadContext(const ThreadContext& ctx) override; void PrepareReschedule() override; |