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-rw-r--r--src/core/arm/arm_interface.h43
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic.cpp163
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic.h15
-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp28
-rw-r--r--src/core/arm/dyncom/arm_dyncom.h12
5 files changed, 158 insertions, 103 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index ba528403c..0b3096347 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -5,6 +5,7 @@
#pragma once
#include "common/common_types.h"
+#include "core/hle/kernel/vm_manager.h"
#include "core/arm/skyeye_common/arm_regformat.h"
#include "core/arm/skyeye_common/vfp/asm_vfp.h"
@@ -14,14 +15,18 @@ public:
virtual ~ARM_Interface() {}
struct ThreadContext {
- u32 cpu_registers[13];
- u32 sp;
- u32 lr;
- u32 pc;
- u32 cpsr;
- u32 fpu_registers[64];
- u32 fpscr;
- u32 fpexc;
+ u64 cpu_registers[30];
+ u64 lr;
+ u64 sp;
+ u64 pc;
+ u64 cpsr;
+ u128 fpu_registers[32];
+ u64 fpscr;
+ u64 fpexc;
+
+
+ // TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
+ VAddr tls_address;
};
/**
@@ -38,6 +43,8 @@ public:
Run(1);
}
+ virtual void MapBackingMemory(VAddr address, size_t size, u8* memory, Kernel::VMAPermission perms) {}
+
/// Clear all instruction cache
virtual void ClearInstructionCache() = 0;
@@ -48,27 +55,31 @@ public:
* Set the Program Counter to an address
* @param addr Address to set PC to
*/
- virtual void SetPC(u32 addr) = 0;
+ virtual void SetPC(u64 addr) = 0;
/*
* Get the current Program Counter
* @return Returns current PC
*/
- virtual u32 GetPC() const = 0;
+ virtual u64 GetPC() const = 0;
/**
* Get an ARM register
- * @param index Register index (0-15)
+ * @param index Register index
* @return Returns the value in the register
*/
- virtual u32 GetReg(int index) const = 0;
+ virtual u64 GetReg(int index) const = 0;
/**
* Set an ARM register
- * @param index Register index (0-15)
+ * @param index Register index
* @param value Value to set register to
*/
- virtual void SetReg(int index, u32 value) = 0;
+ virtual void SetReg(int index, u64 value) = 0;
+
+ virtual const u128& GetExtReg(int index) const = 0;
+
+ virtual void SetExtReg(int index, u128& value) = 0;
/**
* Gets the value of a VFP register
@@ -124,6 +135,10 @@ public:
*/
virtual void SetCP15Register(CP15Register reg, u32 value) = 0;
+ virtual VAddr GetTlsAddress() const = 0;
+
+ virtual void SetTlsAddress(VAddr address) = 0;
+
/**
* Saves the current CPU context
* @param ctx Thread context to save
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp
index 2cb56d12f..6dcab5bab 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic.cpp
@@ -14,98 +14,108 @@
#include "core/hle/svc.h"
#include "core/memory.h"
-static void InterpreterFallback(u32 pc, Dynarmic::Jit* jit, void* user_arg) {
- ARMul_State* state = static_cast<ARMul_State*>(user_arg);
+static void InterpreterFallback(u64 pc, Dynarmic::Jit* jit, void* user_arg) {
+ UNIMPLEMENTED_MSG("InterpreterFallback for ARM64 JIT does not exist!");
+}
- state->Reg = jit->Regs();
- state->Cpsr = jit->Cpsr();
- state->Reg[15] = pc;
- state->ExtReg = jit->ExtRegs();
- state->VFP[VFP_FPSCR] = jit->Fpscr();
- state->NumInstrsToExecute = 1;
+static bool IsReadOnlyMemory(u64 vaddr) {
+ // TODO(bunnei): ImplementMe
+ return false;
+}
- InterpreterMainLoop(state);
+u8 MemoryRead8(const u64 addr) {
+ return Memory::Read8(static_cast<VAddr>(addr));
+}
- bool is_thumb = (state->Cpsr & (1 << 5)) != 0;
- state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
+u16 MemoryRead16(const u64 addr) {
+ return Memory::Read16(static_cast<VAddr>(addr));
+}
- jit->Regs() = state->Reg;
- jit->Cpsr() = state->Cpsr;
- jit->ExtRegs() = state->ExtReg;
- jit->SetFpscr(state->VFP[VFP_FPSCR]);
+u32 MemoryRead32(const u64 addr) {
+ return Memory::Read32(static_cast<VAddr>(addr));
}
-static bool IsReadOnlyMemory(u32 vaddr) {
- // TODO(bunnei): ImplementMe
- return false;
+u64 MemoryRead64(const u64 addr) {
+ return Memory::Read64(static_cast<VAddr>(addr));
+}
+
+void MemoryWrite8(const u64 addr, const u8 data) {
+ Memory::Write8(static_cast<VAddr>(addr), data);
+}
+
+void MemoryWrite16(const u64 addr, const u16 data) {
+ Memory::Write16(static_cast<VAddr>(addr), data);
+}
+
+void MemoryWrite32(const u64 addr, const u32 data) {
+ Memory::Write32(static_cast<VAddr>(addr), data);
+}
+
+void MemoryWrite64(const u64 addr, const u64 data) {
+ Memory::Write64(static_cast<VAddr>(addr), data);
}
-static Dynarmic::UserCallbacks GetUserCallbacks(
- const std::shared_ptr<ARMul_State>& interpeter_state, Memory::PageTable* current_page_table) {
+static Dynarmic::UserCallbacks GetUserCallbacks(ARM_Dynarmic* this_) {
Dynarmic::UserCallbacks user_callbacks{};
user_callbacks.InterpreterFallback = &InterpreterFallback;
- user_callbacks.user_arg = static_cast<void*>(interpeter_state.get());
+ user_callbacks.user_arg = static_cast<void*>(this_);
user_callbacks.CallSVC = &SVC::CallSVC;
user_callbacks.memory.IsReadOnlyMemory = &IsReadOnlyMemory;
- user_callbacks.memory.ReadCode = &Memory::Read32;
- user_callbacks.memory.Read8 = &Memory::Read8;
- user_callbacks.memory.Read16 = &Memory::Read16;
- user_callbacks.memory.Read32 = &Memory::Read32;
- user_callbacks.memory.Read64 = &Memory::Read64;
- user_callbacks.memory.Write8 = &Memory::Write8;
- user_callbacks.memory.Write16 = &Memory::Write16;
- user_callbacks.memory.Write32 = &Memory::Write32;
- user_callbacks.memory.Write64 = &Memory::Write64;
- user_callbacks.page_table = &current_page_table->pointers;
- user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state);
+ user_callbacks.memory.ReadCode = &MemoryRead32;
+ user_callbacks.memory.Read8 = &MemoryRead8;
+ user_callbacks.memory.Read16 = &MemoryRead16;
+ user_callbacks.memory.Read32 = &MemoryRead32;
+ user_callbacks.memory.Read64 = &MemoryRead64;
+ user_callbacks.memory.Write8 = &MemoryWrite8;
+ user_callbacks.memory.Write16 = &MemoryWrite16;
+ user_callbacks.memory.Write32 = &MemoryWrite32;
+ user_callbacks.memory.Write64 = &MemoryWrite64;
+ //user_callbacks.page_table = Memory::GetCurrentPageTablePointers();
return user_callbacks;
}
ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) {
- interpreter_state = std::make_shared<ARMul_State>(initial_mode);
- PageTableChanged();
}
-void ARM_Dynarmic::SetPC(u32 pc) {
- jit->Regs()[15] = pc;
+void ARM_Dynarmic::MapBackingMemory(VAddr address, size_t size, u8* memory, Kernel::VMAPermission perms) {
+}
+
+void ARM_Dynarmic::SetPC(u64 pc) {
+ jit->Regs64()[32] = pc;
+}
+
+u64 ARM_Dynarmic::GetPC() const {
+ return jit->Regs64()[32];
+}
+
+u64 ARM_Dynarmic::GetReg(int index) const {
+ return jit->Regs64()[index];
}
-u32 ARM_Dynarmic::GetPC() const {
- return jit->Regs()[15];
+void ARM_Dynarmic::SetReg(int index, u64 value) {
+ jit->Regs64()[index] = value;
}
-u32 ARM_Dynarmic::GetReg(int index) const {
- return jit->Regs()[index];
+const u128& ARM_Dynarmic::GetExtReg(int index) const {
+ return jit->ExtRegs64()[index];
}
-void ARM_Dynarmic::SetReg(int index, u32 value) {
- jit->Regs()[index] = value;
+void ARM_Dynarmic::SetExtReg(int index, u128& value) {
+ jit->ExtRegs64()[index] = value;
}
u32 ARM_Dynarmic::GetVFPReg(int index) const {
- return jit->ExtRegs()[index];
+ return {};
}
void ARM_Dynarmic::SetVFPReg(int index, u32 value) {
- jit->ExtRegs()[index] = value;
}
u32 ARM_Dynarmic::GetVFPSystemReg(VFPSystemRegister reg) const {
- if (reg == VFP_FPSCR) {
- return jit->Fpscr();
- }
-
- // Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
- return interpreter_state->VFP[reg];
+ return {};
}
void ARM_Dynarmic::SetVFPSystemReg(VFPSystemRegister reg, u32 value) {
- if (reg == VFP_FPSCR) {
- jit->SetFpscr(value);
- }
-
- // Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
- interpreter_state->VFP[reg] = value;
}
u32 ARM_Dynarmic::GetCPSR() const {
@@ -117,11 +127,18 @@ void ARM_Dynarmic::SetCPSR(u32 cpsr) {
}
u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) {
- return interpreter_state->CP15[reg];
+ return {};
}
void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
- interpreter_state->CP15[reg] = value;
+}
+
+VAddr ARM_Dynarmic::GetTlsAddress() const {
+ return jit->TlsAddr();
+}
+
+void ARM_Dynarmic::SetTlsAddress(VAddr address) {
+ jit->TlsAddr() = address;
}
MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64));
@@ -136,29 +153,29 @@ void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
}
void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
- memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers));
- memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers));
+ memcpy(ctx.cpu_registers, jit->Regs64().data(), sizeof(ctx.cpu_registers));
+ memcpy(ctx.fpu_registers, jit->ExtRegs64().data(), sizeof(ctx.fpu_registers));
- ctx.sp = jit->Regs()[13];
- ctx.lr = jit->Regs()[14];
- ctx.pc = jit->Regs()[15];
+ ctx.lr = jit->Regs64()[30];
+ ctx.sp = jit->Regs64()[31];
+ ctx.pc = jit->Regs64()[32];
ctx.cpsr = jit->Cpsr();
- ctx.fpscr = jit->Fpscr();
- ctx.fpexc = interpreter_state->VFP[VFP_FPEXC];
+ // TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
+ ctx.tls_address = jit->TlsAddr();
}
void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
- memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
- memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
+ memcpy(jit->Regs64().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
+ memcpy(jit->ExtRegs64().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
- jit->Regs()[13] = ctx.sp;
- jit->Regs()[14] = ctx.lr;
- jit->Regs()[15] = ctx.pc;
+ jit->Regs64()[30] = ctx.lr;
+ jit->Regs64()[31] = ctx.sp;
+ jit->Regs64()[32] = ctx.pc;
jit->Cpsr() = ctx.cpsr;
- jit->SetFpscr(ctx.fpscr);
- interpreter_state->VFP[VFP_FPEXC] = ctx.fpexc;
+ // TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
+ jit->TlsAddr() = ctx.tls_address;
}
void ARM_Dynarmic::PrepareReschedule() {
@@ -180,6 +197,6 @@ void ARM_Dynarmic::PageTableChanged() {
return;
}
- jit = new Dynarmic::Jit(GetUserCallbacks(interpreter_state, current_page_table));
+ jit = new Dynarmic::Jit(GetUserCallbacks(this), Dynarmic::Arch::ARM64);
jits.emplace(current_page_table, std::unique_ptr<Dynarmic::Jit>(jit));
}
diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h
index 0b00158a5..6567359b0 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.h
+++ b/src/core/arm/dynarmic/arm_dynarmic.h
@@ -19,10 +19,14 @@ class ARM_Dynarmic final : public ARM_Interface {
public:
ARM_Dynarmic(PrivilegeMode initial_mode);
- void SetPC(u32 pc) override;
- u32 GetPC() const override;
- u32 GetReg(int index) const override;
- void SetReg(int index, u32 value) override;
+ void MapBackingMemory(VAddr address, size_t size, u8* memory, Kernel::VMAPermission perms) override;
+
+ void SetPC(u64 pc) override;
+ u64 GetPC() const override;
+ u64 GetReg(int index) const override;
+ void SetReg(int index, u64 value) override;
+ const u128& GetExtReg(int index) const override;
+ void SetExtReg(int index, u128& value) override;
u32 GetVFPReg(int index) const override;
void SetVFPReg(int index, u32 value) override;
u32 GetVFPSystemReg(VFPSystemRegister reg) const override;
@@ -31,6 +35,8 @@ public:
void SetCPSR(u32 cpsr) override;
u32 GetCP15Register(CP15Register reg) override;
void SetCP15Register(CP15Register reg, u32 value) override;
+ VAddr GetTlsAddress() const override;
+ void SetTlsAddress(VAddr address) override;
void SaveContext(ThreadContext& ctx) override;
void LoadContext(const ThreadContext& ctx) override;
@@ -45,5 +51,4 @@ private:
Dynarmic::Jit* jit = nullptr;
Memory::PageTable* current_page_table = nullptr;
std::map<Memory::PageTable*, std::unique_ptr<Dynarmic::Jit>> jits;
- std::shared_ptr<ARMul_State> interpreter_state;
};
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 4d72aef77..5ebf7a2f1 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -25,26 +25,33 @@ void ARM_DynCom::ClearInstructionCache() {
trans_cache_buf_top = 0;
}
-void ARM_DynCom::PageTableChanged() {
- ClearInstructionCache();
+void ARM_DynCom::SetPC(u64 pc) {
+ state->Reg[15] = pc;
}
-void ARM_DynCom::SetPC(u32 pc) {
- state->Reg[15] = pc;
+void ARM_DynCom::PageTableChanged() {
+ ClearInstructionCache();
}
-u32 ARM_DynCom::GetPC() const {
+u64 ARM_DynCom::GetPC() const {
return state->Reg[15];
}
-u32 ARM_DynCom::GetReg(int index) const {
+u64 ARM_DynCom::GetReg(int index) const {
return state->Reg[index];
}
-void ARM_DynCom::SetReg(int index, u32 value) {
+void ARM_DynCom::SetReg(int index, u64 value) {
state->Reg[index] = value;
}
+const u128& ARM_DynCom::GetExtReg(int index) const {
+ return {};
+}
+
+void ARM_DynCom::SetExtReg(int index, u128& value) {
+}
+
u32 ARM_DynCom::GetVFPReg(int index) const {
return state->ExtReg[index];
}
@@ -77,6 +84,13 @@ void ARM_DynCom::SetCP15Register(CP15Register reg, u32 value) {
state->CP15[reg] = value;
}
+VAddr ARM_DynCom::GetTlsAddress() const {
+ return {};
+}
+
+void ARM_DynCom::SetTlsAddress(VAddr /*address*/) {
+}
+
void ARM_DynCom::ExecuteInstructions(int num_instructions) {
state->NumInstrsToExecute = num_instructions;
diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h
index fc1ffed6a..cc3c0f3da 100644
--- a/src/core/arm/dyncom/arm_dyncom.h
+++ b/src/core/arm/dyncom/arm_dyncom.h
@@ -18,10 +18,12 @@ public:
void ClearInstructionCache() override;
void PageTableChanged() override;
- void SetPC(u32 pc) override;
- u32 GetPC() const override;
- u32 GetReg(int index) const override;
- void SetReg(int index, u32 value) override;
+ void SetPC(u64 pc) override;
+ u64 GetPC() const override;
+ u64 GetReg(int index) const override;
+ void SetReg(int index, u64 value) override;
+ const u128& GetExtReg(int index) const override;
+ void SetExtReg(int index, u128& value) override;
u32 GetVFPReg(int index) const override;
void SetVFPReg(int index, u32 value) override;
u32 GetVFPSystemReg(VFPSystemRegister reg) const override;
@@ -30,6 +32,8 @@ public:
void SetCPSR(u32 cpsr) override;
u32 GetCP15Register(CP15Register reg) override;
void SetCP15Register(CP15Register reg, u32 value) override;
+ VAddr GetTlsAddress() const override;
+ void SetTlsAddress(VAddr address) override;
void SaveContext(ThreadContext& ctx) override;
void LoadContext(const ThreadContext& ctx) override;