diff options
Diffstat (limited to 'src/video_core/engines')
-rw-r--r-- | src/video_core/engines/const_buffer_engine_interface.h | 67 | ||||
-rw-r--r-- | src/video_core/engines/kepler_compute.cpp | 2 | ||||
-rw-r--r-- | src/video_core/engines/maxwell_3d.cpp | 2 | ||||
-rw-r--r-- | src/video_core/engines/maxwell_3d.h | 67 | ||||
-rw-r--r-- | src/video_core/engines/shader_bytecode.h | 11 |
5 files changed, 92 insertions, 57 deletions
diff --git a/src/video_core/engines/const_buffer_engine_interface.h b/src/video_core/engines/const_buffer_engine_interface.h index d56a47710..724ee0fd6 100644 --- a/src/video_core/engines/const_buffer_engine_interface.h +++ b/src/video_core/engines/const_buffer_engine_interface.h @@ -16,11 +16,12 @@ namespace Tegra::Engines { struct SamplerDescriptor { union { - BitField<0, 20, Tegra::Shader::TextureType> texture_type; - BitField<20, 1, u32> is_array; - BitField<21, 1, u32> is_buffer; - BitField<22, 1, u32> is_shadow; - u32 raw{}; + u32 raw = 0; + BitField<0, 2, Tegra::Shader::TextureType> texture_type; + BitField<2, 3, Tegra::Texture::ComponentType> component_type; + BitField<5, 1, u32> is_array; + BitField<6, 1, u32> is_buffer; + BitField<7, 1, u32> is_shadow; }; bool operator==(const SamplerDescriptor& rhs) const noexcept { @@ -31,68 +32,48 @@ struct SamplerDescriptor { return !operator==(rhs); } - static SamplerDescriptor FromTicTexture(Tegra::Texture::TextureType tic_texture_type) { + static SamplerDescriptor FromTIC(const Tegra::Texture::TICEntry& tic) { + using Tegra::Shader::TextureType; SamplerDescriptor result; - switch (tic_texture_type) { + + // This is going to be used to determine the shading language type. + // Because of that we don't care about all component types on color textures. + result.component_type.Assign(tic.r_type.Value()); + + switch (tic.texture_type.Value()) { case Tegra::Texture::TextureType::Texture1D: - result.texture_type.Assign(Tegra::Shader::TextureType::Texture1D); - result.is_array.Assign(0); - result.is_buffer.Assign(0); - result.is_shadow.Assign(0); + result.texture_type.Assign(TextureType::Texture1D); return result; case Tegra::Texture::TextureType::Texture2D: - result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D); - result.is_array.Assign(0); - result.is_buffer.Assign(0); - result.is_shadow.Assign(0); + result.texture_type.Assign(TextureType::Texture2D); return result; case Tegra::Texture::TextureType::Texture3D: - result.texture_type.Assign(Tegra::Shader::TextureType::Texture3D); - result.is_array.Assign(0); - result.is_buffer.Assign(0); - result.is_shadow.Assign(0); + result.texture_type.Assign(TextureType::Texture3D); return result; case Tegra::Texture::TextureType::TextureCubemap: - result.texture_type.Assign(Tegra::Shader::TextureType::TextureCube); - result.is_array.Assign(0); - result.is_buffer.Assign(0); - result.is_shadow.Assign(0); + result.texture_type.Assign(TextureType::TextureCube); return result; case Tegra::Texture::TextureType::Texture1DArray: - result.texture_type.Assign(Tegra::Shader::TextureType::Texture1D); + result.texture_type.Assign(TextureType::Texture1D); result.is_array.Assign(1); - result.is_buffer.Assign(0); - result.is_shadow.Assign(0); return result; case Tegra::Texture::TextureType::Texture2DArray: - result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D); + result.texture_type.Assign(TextureType::Texture2D); result.is_array.Assign(1); - result.is_buffer.Assign(0); - result.is_shadow.Assign(0); return result; case Tegra::Texture::TextureType::Texture1DBuffer: - result.texture_type.Assign(Tegra::Shader::TextureType::Texture1D); - result.is_array.Assign(0); + result.texture_type.Assign(TextureType::Texture1D); result.is_buffer.Assign(1); - result.is_shadow.Assign(0); return result; case Tegra::Texture::TextureType::Texture2DNoMipmap: - result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D); - result.is_array.Assign(0); - result.is_buffer.Assign(0); - result.is_shadow.Assign(0); + result.texture_type.Assign(TextureType::Texture2D); return result; case Tegra::Texture::TextureType::TextureCubeArray: - result.texture_type.Assign(Tegra::Shader::TextureType::TextureCube); + result.texture_type.Assign(TextureType::TextureCube); result.is_array.Assign(1); - result.is_buffer.Assign(0); - result.is_shadow.Assign(0); return result; default: - result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D); - result.is_array.Assign(0); - result.is_buffer.Assign(0); - result.is_shadow.Assign(0); + result.texture_type.Assign(TextureType::Texture2D); return result; } } diff --git a/src/video_core/engines/kepler_compute.cpp b/src/video_core/engines/kepler_compute.cpp index ae52afa79..1ecd65925 100644 --- a/src/video_core/engines/kepler_compute.cpp +++ b/src/video_core/engines/kepler_compute.cpp @@ -89,7 +89,7 @@ SamplerDescriptor KeplerCompute::AccessBindlessSampler(ShaderType stage, u64 con const Texture::TextureHandle tex_handle{memory_manager.Read<u32>(tex_info_address)}; const Texture::FullTextureInfo tex_info = GetTextureInfo(tex_handle); - SamplerDescriptor result = SamplerDescriptor::FromTicTexture(tex_info.tic.texture_type.Value()); + SamplerDescriptor result = SamplerDescriptor::FromTIC(tex_info.tic); result.is_shadow.Assign(tex_info.tsc.depth_compare_enabled.Value()); return result; } diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 89050361e..ce536e29b 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp @@ -638,7 +638,7 @@ SamplerDescriptor Maxwell3D::AccessBindlessSampler(ShaderType stage, u64 const_b const Texture::TextureHandle tex_handle{memory_manager.Read<u32>(tex_info_address)}; const Texture::FullTextureInfo tex_info = GetTextureInfo(tex_handle); - SamplerDescriptor result = SamplerDescriptor::FromTicTexture(tex_info.tic.texture_type.Value()); + SamplerDescriptor result = SamplerDescriptor::FromTIC(tex_info.tic); result.is_shadow.Assign(tex_info.tsc.depth_compare_enabled.Value()); return result; } diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 491cff370..8a9e9992e 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -67,6 +67,7 @@ public: static constexpr std::size_t NumVaryings = 31; static constexpr std::size_t NumImages = 8; // TODO(Rodrigo): Investigate this number static constexpr std::size_t NumClipDistances = 8; + static constexpr std::size_t NumTransformFeedbackBuffers = 4; static constexpr std::size_t MaxShaderProgram = 6; static constexpr std::size_t MaxShaderStage = 5; // Maximum number of const buffers per shader stage. @@ -524,6 +525,12 @@ public: FractionalEven = 2, }; + enum class PolygonMode : u32 { + Point = 0x1b00, + Line = 0x1b01, + Fill = 0x1b02, + }; + struct RenderTargetConfig { u32 address_high; u32 address_low; @@ -621,6 +628,29 @@ public: float depth_range_far; }; + struct TransformFeedbackBinding { + u32 buffer_enable; + u32 address_high; + u32 address_low; + s32 buffer_size; + s32 buffer_offset; + INSERT_UNION_PADDING_WORDS(3); + + GPUVAddr Address() const { + return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | + address_low); + } + }; + static_assert(sizeof(TransformFeedbackBinding) == 32); + + struct TransformFeedbackLayout { + u32 stream; + u32 varying_count; + u32 stride; + INSERT_UNION_PADDING_WORDS(1); + }; + static_assert(sizeof(TransformFeedbackLayout) == 16); + bool IsShaderConfigEnabled(std::size_t index) const { // The VertexB is always enabled. if (index == static_cast<std::size_t>(Regs::ShaderProgram::VertexB)) { @@ -629,6 +659,10 @@ public: return shader_config[index].enable != 0; } + bool IsShaderConfigEnabled(Regs::ShaderProgram type) const { + return IsShaderConfigEnabled(static_cast<std::size_t>(type)); + } + union { struct { INSERT_UNION_PADDING_WORDS(0x45); @@ -677,7 +711,13 @@ public: u32 rasterize_enable; - INSERT_UNION_PADDING_WORDS(0xF1); + std::array<TransformFeedbackBinding, NumTransformFeedbackBuffers> tfb_bindings; + + INSERT_UNION_PADDING_WORDS(0xC0); + + std::array<TransformFeedbackLayout, NumTransformFeedbackBuffers> tfb_layouts; + + INSERT_UNION_PADDING_WORDS(0x1); u32 tfb_enabled; @@ -705,7 +745,12 @@ public: s32 clear_stencil; - INSERT_UNION_PADDING_WORDS(0x7); + INSERT_UNION_PADDING_WORDS(0x2); + + PolygonMode polygon_mode_front; + PolygonMode polygon_mode_back; + + INSERT_UNION_PADDING_WORDS(0x3); u32 polygon_offset_point_enable; u32 polygon_offset_line_enable; @@ -764,7 +809,11 @@ public: BitField<12, 4, u32> viewport; } clear_flags; - INSERT_UNION_PADDING_WORDS(0x19); + INSERT_UNION_PADDING_WORDS(0x10); + + u32 fill_rectangle; + + INSERT_UNION_PADDING_WORDS(0x8); std::array<VertexAttribute, NumVertexAttributes> vertex_attrib_format; @@ -1187,7 +1236,11 @@ public: u32 tex_cb_index; - INSERT_UNION_PADDING_WORDS(0x395); + INSERT_UNION_PADDING_WORDS(0x7D); + + std::array<std::array<u8, 128>, NumTransformFeedbackBuffers> tfb_varying_locs; + + INSERT_UNION_PADDING_WORDS(0x298); struct { /// Compressed address of a buffer that holds information about bound SSBOs. @@ -1413,6 +1466,8 @@ ASSERT_REG_POSITION(tess_mode, 0xC8); ASSERT_REG_POSITION(tess_level_outer, 0xC9); ASSERT_REG_POSITION(tess_level_inner, 0xCD); ASSERT_REG_POSITION(rasterize_enable, 0xDF); +ASSERT_REG_POSITION(tfb_bindings, 0xE0); +ASSERT_REG_POSITION(tfb_layouts, 0x1C0); ASSERT_REG_POSITION(tfb_enabled, 0x1D1); ASSERT_REG_POSITION(rt, 0x200); ASSERT_REG_POSITION(viewport_transform, 0x280); @@ -1422,6 +1477,8 @@ ASSERT_REG_POSITION(depth_mode, 0x35F); ASSERT_REG_POSITION(clear_color[0], 0x360); ASSERT_REG_POSITION(clear_depth, 0x364); ASSERT_REG_POSITION(clear_stencil, 0x368); +ASSERT_REG_POSITION(polygon_mode_front, 0x36B); +ASSERT_REG_POSITION(polygon_mode_back, 0x36C); ASSERT_REG_POSITION(polygon_offset_point_enable, 0x370); ASSERT_REG_POSITION(polygon_offset_line_enable, 0x371); ASSERT_REG_POSITION(polygon_offset_fill_enable, 0x372); @@ -1435,6 +1492,7 @@ ASSERT_REG_POSITION(rt_separate_frag_data, 0x3EB); ASSERT_REG_POSITION(depth_bounds, 0x3E7); ASSERT_REG_POSITION(zeta, 0x3F8); ASSERT_REG_POSITION(clear_flags, 0x43E); +ASSERT_REG_POSITION(fill_rectangle, 0x44F); ASSERT_REG_POSITION(vertex_attrib_format, 0x458); ASSERT_REG_POSITION(rt_control, 0x487); ASSERT_REG_POSITION(zeta_width, 0x48a); @@ -1508,6 +1566,7 @@ ASSERT_REG_POSITION(firmware, 0x8C0); ASSERT_REG_POSITION(const_buffer, 0x8E0); ASSERT_REG_POSITION(cb_bind[0], 0x904); ASSERT_REG_POSITION(tex_cb_index, 0x982); +ASSERT_REG_POSITION(tfb_varying_locs, 0xA00); ASSERT_REG_POSITION(ssbo_info, 0xD18); ASSERT_REG_POSITION(tex_info_buffers.address[0], 0xD2A); ASSERT_REG_POSITION(tex_info_buffers.size[0], 0xD2F); diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index c9bc83cd7..eba42deb4 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -911,14 +911,9 @@ union Instruction { } fadd32i; union { - BitField<20, 8, u64> shift_position; - BitField<28, 8, u64> shift_length; - BitField<48, 1, u64> negate_b; - BitField<49, 1, u64> negate_a; - - u64 GetLeftShiftValue() const { - return 32 - (shift_position + shift_length); - } + BitField<40, 1, u64> brev; + BitField<47, 1, u64> rd_cc; + BitField<48, 1, u64> is_signed; } bfe; union { |