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-rw-r--r--src/video_core/command_processor.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp
index 2083357fe..9602779f4 100644
--- a/src/video_core/command_processor.cpp
+++ b/src/video_core/command_processor.cpp
@@ -9,6 +9,7 @@
#include "primitive_assembly.h"
#include "vertex_shader.h"
#include "core/hle/service/gsp_gpu.h"
+#include "core/hw/gpu.h"
#include "debug_utils/debug_utils.h"
@@ -31,6 +32,10 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
if (id >= registers.NumIds())
return;
+ // If we're skipping this frame, only allow trigger IRQ
+ if (GPU::g_skip_frame && id != PICA_REG_INDEX(trigger_irq))
+ return;
+
// TODO: Figure out how register masking acts on e.g. vs_uniform_setup.set_value
u32 old_value = registers[id];
registers[id] = (old_value & ~mask) | (value & mask);