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-rw-r--r--src/core/CMakeLists.txt1
-rw-r--r--src/core/mem_map.cpp25
-rw-r--r--src/core/memory.cpp243
-rw-r--r--src/core/memory.h4
-rw-r--r--src/core/memory_setup.h29
5 files changed, 174 insertions, 128 deletions
diff --git a/src/core/CMakeLists.txt b/src/core/CMakeLists.txt
index 3b67cc49d..e8d8c96d7 100644
--- a/src/core/CMakeLists.txt
+++ b/src/core/CMakeLists.txt
@@ -212,6 +212,7 @@ set(HEADERS
loader/ncch.h
mem_map.h
memory.h
+ memory_setup.h
settings.h
system.h
)
diff --git a/src/core/mem_map.cpp b/src/core/mem_map.cpp
index 66c2f77c0..5ecec9566 100644
--- a/src/core/mem_map.cpp
+++ b/src/core/mem_map.cpp
@@ -7,8 +7,11 @@
#include "common/common_types.h"
#include "common/logging/log.h"
+#include "core/hle/config_mem.h"
+#include "core/hle/shared_page.h"
#include "core/mem_map.h"
#include "core/memory.h"
+#include "core/memory_setup.h"
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -26,18 +29,19 @@ namespace {
struct MemoryArea {
u8** ptr;
- size_t size;
+ u32 base;
+ u32 size;
};
// We don't declare the IO regions in here since its handled by other means.
static MemoryArea memory_areas[] = {
- {&g_exefs_code, PROCESS_IMAGE_MAX_SIZE},
- {&g_heap, HEAP_SIZE },
- {&g_shared_mem, SHARED_MEMORY_SIZE },
- {&g_heap_linear, LINEAR_HEAP_SIZE },
- {&g_vram, VRAM_SIZE },
- {&g_dsp_mem, DSP_RAM_SIZE },
- {&g_tls_mem, TLS_AREA_SIZE },
+ {&g_exefs_code, PROCESS_IMAGE_VADDR, PROCESS_IMAGE_MAX_SIZE},
+ {&g_heap, HEAP_VADDR, HEAP_SIZE },
+ {&g_shared_mem, SHARED_MEMORY_VADDR, SHARED_MEMORY_SIZE },
+ {&g_heap_linear, LINEAR_HEAP_VADDR, LINEAR_HEAP_SIZE },
+ {&g_vram, VRAM_VADDR, VRAM_SIZE },
+ {&g_dsp_mem, DSP_RAM_VADDR, DSP_RAM_SIZE },
+ {&g_tls_mem, TLS_AREA_VADDR, TLS_AREA_SIZE },
};
/// Represents a block of memory mapped by ControlMemory/MapMemoryBlock
@@ -132,9 +136,14 @@ VAddr PhysicalToVirtualAddress(const PAddr addr) {
}
void Init() {
+ InitMemoryMap();
+
for (MemoryArea& area : memory_areas) {
*area.ptr = new u8[area.size];
+ MapMemoryRegion(area.base, area.size, *area.ptr);
}
+ MapMemoryRegion(CONFIG_MEMORY_VADDR, CONFIG_MEMORY_SIZE, (u8*)&ConfigMem::config_mem);
+ MapMemoryRegion(SHARED_PAGE_VADDR, SHARED_PAGE_SIZE, (u8*)&SharedPage::shared_page);
LOG_DEBUG(HW_Memory, "initialized OK, RAM at %p", g_heap);
}
diff --git a/src/core/memory.cpp b/src/core/memory.cpp
index 8570689dd..5d8069acd 100644
--- a/src/core/memory.cpp
+++ b/src/core/memory.cpp
@@ -1,7 +1,10 @@
-// Copyright 2014 Citra Emulator Project
+// Copyright 2015 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
+#include <array>
+
+#include "common/assert.h"
#include "common/common_types.h"
#include "common/logging/log.h"
#include "common/swap.h"
@@ -14,126 +17,134 @@
namespace Memory {
-template <typename T>
-inline void Read(T &var, const VAddr vaddr) {
- // TODO: Figure out the fastest order of tests for both read and write (they are probably different).
- // TODO: Make sure this represents the mirrors in a correct way.
- // Could just do a base-relative read, too.... TODO
-
- // Kernel memory command buffer
- if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
- var = *((const T*)&g_tls_mem[vaddr - TLS_AREA_VADDR]);
-
- // ExeFS:/.code is loaded here
- } else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
- var = *((const T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR]);
-
- // FCRAM - linear heap
- } else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
- var = *((const T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR]);
-
- // FCRAM - application heap
- } else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
- var = *((const T*)&g_heap[vaddr - HEAP_VADDR]);
-
- // Shared memory
- } else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
- var = *((const T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR]);
-
- // Config memory
- } else if ((vaddr >= CONFIG_MEMORY_VADDR) && (vaddr < CONFIG_MEMORY_VADDR_END)) {
- const u8* raw_memory = (const u8*)&ConfigMem::config_mem;
- var = *((const T*)&raw_memory[vaddr - CONFIG_MEMORY_VADDR]);
-
- // Shared page
- } else if ((vaddr >= SHARED_PAGE_VADDR) && (vaddr < SHARED_PAGE_VADDR_END)) {
- const u8* raw_memory = (const u8*)&SharedPage::shared_page;
- var = *((const T*)&raw_memory[vaddr - SHARED_PAGE_VADDR]);
-
- // DSP memory
- } else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) {
- var = *((const T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR]);
-
- // VRAM
- } else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
- var = *((const T*)&g_vram[vaddr - VRAM_VADDR]);
-
- } else {
- LOG_ERROR(HW_Memory, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, vaddr);
+const u32 PAGE_MASK = PAGE_SIZE - 1;
+const int PAGE_BITS = 12;
+
+enum class PageType {
+ /// Page is unmapped and should cause an access error.
+ Unmapped,
+ /// Page is mapped to regular memory. This is the only type you can get pointers to.
+ Memory,
+ /// Page is mapped to a I/O region. Writing and reading to this page is handled by functions.
+ Special,
+};
+
+/**
+ * A (reasonably) fast way of allowing switchable and remmapable process address spaces. It loosely
+ * mimics the way a real CPU page table works, but instead is optimized for minimal decoding and
+ * fetching requirements when acessing. In the usual case of an access to regular memory, it only
+ * requires an indexed fetch and a check for NULL.
+ */
+struct PageTable {
+ static const size_t NUM_ENTRIES = 1 << (32 - PAGE_BITS);
+
+ /**
+ * Array of memory pointers backing each page. An entry can only be non-null if the
+ * corresponding entry in the `attributes` array is of type `Memory`.
+ */
+ std::array<u8*, NUM_ENTRIES> pointers;
+
+ /**
+ * Array of fine grained page attributes. If it is set to any value other than `Memory`, then
+ * the corresponding entry in `pointer` MUST be set to null.
+ */
+ std::array<PageType, NUM_ENTRIES> attributes;
+};
+
+/// Singular page table used for the singleton process
+static PageTable main_page_table;
+/// Currently active page table
+static PageTable* current_page_table = &main_page_table;
+
+static void MapPages(u32 base, u32 size, u8* memory, PageType type) {
+ LOG_DEBUG(HW_Memory, "Mapping %p onto %08X-%08X", memory, base * PAGE_SIZE, (base + size) * PAGE_SIZE);
+
+ u32 end = base + size;
+
+ while (base != end) {
+ ASSERT_MSG(base < PageTable::NUM_ENTRIES, "out of range mapping at %08X", base);
+
+ if (current_page_table->attributes[base] != PageType::Unmapped) {
+ LOG_ERROR(HW_Memory, "overlapping memory ranges at %08X", base * PAGE_SIZE);
+ }
+ current_page_table->attributes[base] = type;
+ current_page_table->pointers[base] = memory;
+
+ base += 1;
+ memory += PAGE_SIZE;
}
}
-template <typename T>
-inline void Write(const VAddr vaddr, const T data) {
-
- // Kernel memory command buffer
- if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
- *(T*)&g_tls_mem[vaddr - TLS_AREA_VADDR] = data;
-
- // ExeFS:/.code is loaded here
- } else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
- *(T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR] = data;
-
- // FCRAM - linear heap
- } else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
- *(T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR] = data;
-
- // FCRAM - application heap
- } else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
- *(T*)&g_heap[vaddr - HEAP_VADDR] = data;
-
- // Shared memory
- } else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
- *(T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR] = data;
+void InitMemoryMap() {
+ main_page_table.pointers.fill(nullptr);
+ main_page_table.attributes.fill(PageType::Unmapped);
+}
- // VRAM
- } else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
- *(T*)&g_vram[vaddr - VRAM_VADDR] = data;
+void MapMemoryRegion(VAddr base, u32 size, u8* target) {
+ ASSERT_MSG((size & PAGE_MASK) == 0, "non-page aligned size: %08X", size);
+ ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: %08X", base);
+ MapPages(base / PAGE_SIZE, size / PAGE_SIZE, target, PageType::Memory);
+}
- // DSP memory
- } else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) {
- *(T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR] = data;
+void MapIoRegion(VAddr base, u32 size) {
+ ASSERT_MSG((size & PAGE_MASK) == 0, "non-page aligned size: %08X", size);
+ ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: %08X", base);
+ MapPages(base / PAGE_SIZE, size / PAGE_SIZE, nullptr, PageType::Special);
+}
- //} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) {
- // ASSERT_MSG(MEMMAP, false, "umimplemented write to Configuration Memory");
- //} else if ((vaddr & 0xFFFFF000) == 0x1FF81000) {
- // ASSERT_MSG(MEMMAP, false, "umimplemented write to shared page");
+template <typename T>
+T Read(const VAddr vaddr) {
+ const u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
+ if (page_pointer) {
+ return *reinterpret_cast<const T*>(page_pointer + (vaddr & PAGE_MASK));
+ }
- // Error out...
- } else {
- LOG_ERROR(HW_Memory, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, vaddr);
+ PageType type = current_page_table->attributes[vaddr >> PAGE_BITS];
+ switch (type) {
+ case PageType::Unmapped:
+ LOG_ERROR(HW_Memory, "unmapped Read%lu @ 0x%08X", sizeof(T) * 8, vaddr);
+ return 0;
+ case PageType::Memory:
+ ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
+ case PageType::Special:
+ LOG_ERROR(HW_Memory, "I/O reads aren't implemented yet @ %08X", vaddr);
+ return 0;
+ default:
+ UNREACHABLE();
}
}
-u8 *GetPointer(const VAddr vaddr) {
- // Kernel memory command buffer
- if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
- return g_tls_mem + (vaddr - TLS_AREA_VADDR);
-
- // ExeFS:/.code is loaded here
- } else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
- return g_exefs_code + (vaddr - PROCESS_IMAGE_VADDR);
-
- // FCRAM - linear heap
- } else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
- return g_heap_linear + (vaddr - LINEAR_HEAP_VADDR);
-
- // FCRAM - application heap
- } else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
- return g_heap + (vaddr - HEAP_VADDR);
-
- // Shared memory
- } else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
- return g_shared_mem + (vaddr - SHARED_MEMORY_VADDR);
+template <typename T>
+void Write(const VAddr vaddr, const T data) {
+ u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
+ if (page_pointer) {
+ *reinterpret_cast<T*>(page_pointer + (vaddr & PAGE_MASK)) = data;
+ return;
+ }
- // VRAM
- } else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
- return g_vram + (vaddr - VRAM_VADDR);
+ PageType type = current_page_table->attributes[vaddr >> PAGE_BITS];
+ switch (type) {
+ case PageType::Unmapped:
+ LOG_ERROR(HW_Memory, "unmapped Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32) data, vaddr);
+ return;
+ case PageType::Memory:
+ ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
+ case PageType::Special:
+ LOG_ERROR(HW_Memory, "I/O writes aren't implemented yet @ %08X", vaddr);
+ return;
+ default:
+ UNREACHABLE();
+ }
+}
- } else {
- LOG_ERROR(HW_Memory, "unknown GetPointer @ 0x%08x", vaddr);
- return 0;
+u8* GetPointer(const VAddr vaddr) {
+ u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
+ if (page_pointer) {
+ return page_pointer + (vaddr & PAGE_MASK);
}
+
+ LOG_ERROR(HW_Memory, "unknown GetPointer @ 0x%08x", vaddr);
+ return nullptr;
}
u8* GetPhysicalPointer(PAddr address) {
@@ -141,27 +152,19 @@ u8* GetPhysicalPointer(PAddr address) {
}
u8 Read8(const VAddr addr) {
- u8 data = 0;
- Read<u8>(data, addr);
- return data;
+ return Read<u8>(addr);
}
u16 Read16(const VAddr addr) {
- u16_le data = 0;
- Read<u16_le>(data, addr);
- return data;
+ return Read<u16_le>(addr);
}
u32 Read32(const VAddr addr) {
- u32_le data = 0;
- Read<u32_le>(data, addr);
- return data;
+ return Read<u32_le>(addr);
}
u64 Read64(const VAddr addr) {
- u64_le data = 0;
- Read<u64_le>(data, addr);
- return data;
+ return Read<u64_le>(addr);
}
void Write8(const VAddr addr, const u8 data) {
diff --git a/src/core/memory.h b/src/core/memory.h
index 5ae7784e0..2d225801b 100644
--- a/src/core/memory.h
+++ b/src/core/memory.h
@@ -8,6 +8,10 @@
namespace Memory {
+/**
+ * Page size used by the ARM architecture. This is the smallest granularity with which memory can
+ * be mapped.
+ */
const u32 PAGE_SIZE = 0x1000;
/// Physical memory regions as seen from the ARM11
diff --git a/src/core/memory_setup.h b/src/core/memory_setup.h
new file mode 100644
index 000000000..46263495f
--- /dev/null
+++ b/src/core/memory_setup.h
@@ -0,0 +1,29 @@
+// Copyright 2015 Citra Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#pragma once
+
+#include "common/common_types.h"
+
+namespace Memory {
+
+void InitMemoryMap();
+
+/**
+ * Maps an allocated buffer onto a region of the emulated process address space.
+ *
+ * @param base The address to start mapping at. Must be page-aligned.
+ * @param size The amount of bytes to map. Must be page-aligned.
+ * @param target Buffer with the memory backing the mapping. Must be of length at least `size`.
+ */
+void MapMemoryRegion(VAddr base, u32 size, u8* target);
+
+/**
+ * Maps a region of the emulated process address space as a IO region.
+ * @note Currently this can only be used to mark a region as being IO, since actual memory-mapped
+ * IO isn't yet supported.
+ */
+void MapIoRegion(VAddr base, u32 size);
+
+}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 15:20:34 +0100