diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/hle/service/gsp.cpp | 6 | ||||
| -rw-r--r-- | src/core/hw/gpu.cpp | 26 | ||||
| -rw-r--r-- | src/core/hw/gpu.h | 30 |
3 files changed, 31 insertions, 31 deletions
diff --git a/src/core/hle/service/gsp.cpp b/src/core/hle/service/gsp.cpp index d51e6c66d..15e9d19a5 100644 --- a/src/core/hle/service/gsp.cpp +++ b/src/core/hle/service/gsp.cpp @@ -123,9 +123,9 @@ void TriggerCmdReqQueue(Service::Interface* self) { break; case GXCommandId::SET_COMMAND_LIST_LAST: - GPU::Write<u32>(GPU::CommandListAddress, cmd_buff[1] >> 3); - GPU::Write<u32>(GPU::CommandListSize, cmd_buff[2] >> 3); - GPU::Write<u32>(GPU::ProcessCommandList, 1); // TODO: Not sure if we are supposed to always write this + GPU::Write<u32>(GPU::Registers::CommandListAddress, cmd_buff[1] >> 3); + GPU::Write<u32>(GPU::Registers::CommandListSize, cmd_buff[2] >> 3); + GPU::Write<u32>(GPU::Registers::ProcessCommandList, 1); // TODO: Not sure if we are supposed to always write this break; case GXCommandId::SET_MEMORY_FILL: diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp index 632e1aaac..ec2d0e156 100644 --- a/src/core/hw/gpu.cpp +++ b/src/core/hw/gpu.cpp @@ -86,39 +86,39 @@ const u8* GetFramebufferPointer(const u32 address) { template <typename T> inline void Read(T &var, const u32 addr) { switch (addr) { - case REG_FRAMEBUFFER_TOP_LEFT_1: + case Registers::FramebufferTopLeft1: var = g_regs.framebuffer_top_left_1; break; - case REG_FRAMEBUFFER_TOP_LEFT_2: + case Registers::FramebufferTopLeft2: var = g_regs.framebuffer_top_left_2; break; - case REG_FRAMEBUFFER_TOP_RIGHT_1: + case Registers::FramebufferTopRight1: var = g_regs.framebuffer_top_right_1; break; - case REG_FRAMEBUFFER_TOP_RIGHT_2: + case Registers::FramebufferTopRight2: var = g_regs.framebuffer_top_right_2; break; - case REG_FRAMEBUFFER_SUB_LEFT_1: + case Registers::FramebufferSubLeft1: var = g_regs.framebuffer_sub_left_1; break; - case REG_FRAMEBUFFER_SUB_RIGHT_1: + case Registers::FramebufferSubRight1: var = g_regs.framebuffer_sub_right_1; break; - case CommandListSize: + case Registers::CommandListSize: var = g_regs.command_list_size; break; - case CommandListAddress: + case Registers::CommandListAddress: var = g_regs.command_list_address; break; - case ProcessCommandList: + case Registers::ProcessCommandList: var = g_regs.command_processing_enabled; break; @@ -130,16 +130,16 @@ inline void Read(T &var, const u32 addr) { template <typename T> inline void Write(u32 addr, const T data) { - switch (addr) { - case CommandListSize: + switch (static_cast<Registers::Id>(addr)) { + case Registers::CommandListSize: g_regs.command_list_size = data; break; - case CommandListAddress: + case Registers::CommandListAddress: g_regs.command_list_address = data; break; - case ProcessCommandList: + case Registers::ProcessCommandList: g_regs.command_processing_enabled = data; if (g_regs.command_processing_enabled & 1) { diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h index c81b1bb3f..f26f25e98 100644 --- a/src/core/hw/gpu.h +++ b/src/core/hw/gpu.h @@ -9,6 +9,21 @@ namespace GPU { struct Registers { + enum Id : u32 { + FramebufferTopLeft1 = 0x1EF00468, // Main LCD, first framebuffer for 3D left + FramebufferTopLeft2 = 0x1EF0046C, // Main LCD, second framebuffer for 3D left + FramebufferTopRight1 = 0x1EF00494, // Main LCD, first framebuffer for 3D right + FramebufferTopRight2 = 0x1EF00498, // Main LCD, second framebuffer for 3D right + FramebufferSubLeft1 = 0x1EF00568, // Sub LCD, first framebuffer + FramebufferSubLeft2 = 0x1EF0056C, // Sub LCD, second framebuffer + FramebufferSubRight1 = 0x1EF00594, // Sub LCD, unused first framebuffer + FramebufferSubRight2 = 0x1EF00598, // Sub LCD, unused second framebuffer + + CommandListSize = 0x1EF018E0, + CommandListAddress = 0x1EF018E8, + ProcessCommandList = 0x1EF018F0, + }; + u32 framebuffer_top_left_1; u32 framebuffer_top_left_2; u32 framebuffer_top_right_1; @@ -52,21 +67,6 @@ enum { PADDR_VRAM_SUB_FRAME2 = 0x18249CF0, }; -enum { - REG_FRAMEBUFFER_TOP_LEFT_1 = 0x1EF00468, // Main LCD, first framebuffer for 3D left - REG_FRAMEBUFFER_TOP_LEFT_2 = 0x1EF0046C, // Main LCD, second framebuffer for 3D left - REG_FRAMEBUFFER_TOP_RIGHT_1 = 0x1EF00494, // Main LCD, first framebuffer for 3D right - REG_FRAMEBUFFER_TOP_RIGHT_2 = 0x1EF00498, // Main LCD, second framebuffer for 3D right - REG_FRAMEBUFFER_SUB_LEFT_1 = 0x1EF00568, // Sub LCD, first framebuffer - REG_FRAMEBUFFER_SUB_LEFT_2 = 0x1EF0056C, // Sub LCD, second framebuffer - REG_FRAMEBUFFER_SUB_RIGHT_1 = 0x1EF00594, // Sub LCD, unused first framebuffer - REG_FRAMEBUFFER_SUB_RIGHT_2 = 0x1EF00598, // Sub LCD, unused second framebuffer - - CommandListSize = 0x1EF018E0, - CommandListAddress = 0x1EF018E8, - ProcessCommandList = 0x1EF018F0, -}; - /// Framebuffer location enum FramebufferLocation { FRAMEBUFFER_LOCATION_UNKNOWN, ///< Framebuffer location is unknown |