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* core: decouple ARM interface from DynarmicLiam2023-06-131-0/+29
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* core: Implement separate A32/A64 ARM interfaces.bunnei2020-03-031-96/+0
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* ARM_Interface: Cache the JITs instead of deleting/recreating.Fernando Sahmkow2020-02-261-2/+10
| | | | | | This was a bug inherited from citra which was fixed by then at some time. This commit corrects such bug and ensures JITs are correctly recycled.
* core/memory: Migrate over Write{8, 16, 32, 64, Block} to the Memory classLioncash2019-11-271-1/+6
| | | | | | | | | The Write functions are used slightly less than the Read functions, which make these a bit nicer to move over. The only adjustments we really need to make here are to Dynarmic's exclusive monitor instance. We need to keep a reference to the currently active memory instance to perform exclusive read/write operations.
* core: Prepare various classes for memory read/write migrationLioncash2019-11-271-1/+0
| | | | | | | | | | Amends a few interfaces to be able to handle the migration over to the new Memory class by passing the class by reference as a function parameter where necessary. Notably, within the filesystem services, this eliminates two ReadBlock() calls by using the helper functions of HLERequestContext to do that for us.
* core/arm: Remove obsolete Unicorn memory mappingLioncash2019-07-111-3/+0
| | | | | | | | This was initially necessary when AArch64 JIT emulation was in its infancy and all memory-related instructions weren't implemented. Given the JIT now has all of these facilities implemented, we can remove these functions from the CPU interface.
* core/cpu_core_manager: Create threads separately from initialization.Lioncash2019-04-121-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our initialization process is a little wonky than one would expect when it comes to code flow. We initialize the CPU last, as opposed to hardware, where the CPU obviously needs to be first, otherwise nothing else would work, and we have code that adds checks to get around this. For example, in the page table setting code, we check to see if the system is turned on before we even notify the CPU instances of a page table switch. This results in dead code (at the moment), because the only time a page table switch will occur is when the system is *not* running, preventing the emulated CPU instances from being notified of a page table switch in a convenient manner (technically the code path could be taken, but we don't emulate the process creation svc handlers yet). This moves the threads creation into its own member function of the core manager and restores a little order (and predictability) to our initialization process. Previously, in the multi-threaded cases, we'd kick off several threads before even the main kernel process was created and ready to execute (gross!). Now the initialization process is like so: Initialization: 1. Timers 2. CPU 3. Kernel 4. Filesystem stuff (kind of gross, but can be amended trivially) 5. Applet stuff (ditto in terms of being kind of gross) 6. Main process (will be moved into the loading step in a following change) 7. Telemetry (this should be initialized last in the future). 8. Services (4 and 5 should ideally be alongside this). 9. GDB (gross. Uses namespace scope state. Needs to be refactored into a class or booted altogether). 10. Renderer 11. GPU (will also have its threads created in a separate step in a following change). Which... isn't *ideal* per-se, however getting rid of the wonky intertwining of CPU state initialization out of this mix gets rid of most of the footguns when it comes to our initialization process.
* kernel/svc: Deglobalize the supervisor call handlersLioncash2019-04-081-7/+3
| | | | | | | | | | | Adjusts the interface of the wrappers to take a system reference, which allows accessing a system instance without using the global accessors. This also allows getting rid of all global accessors within the supervisor call handling code. While this does make the wrappers themselves slightly more noisy, this will be further cleaned up in a follow-up. This eliminates the global system accessors in the current code while preserving the existing interface.
* arm/arm_dynarmic: Remove unnecessary current_page_table memberLioncash2019-04-071-6/+0
| | | | | Given the page table will always be guaranteed to be that of whatever the current process is, we no longer need to keep this around.
* core: Add missing override specifiers where applicableLioncash2019-04-041-2/+2
| | | | | | | | | Applies the override specifier where applicable. In the case of destructors that are defaulted in their definition, they can simply be removed. This also removes the unnecessary inclusions being done in audin_u and audrec_u, given their close proximity.
* core: Move PageTable struct into Common.bunnei2019-03-171-2/+2
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* core_timing: Convert core timing into a classLioncash2019-02-161-1/+7
| | | | | | | | | | | Gets rid of the largest set of mutable global state within the core. This also paves a way for eliminating usages of GetInstance() on the System class as a follow-up. Note that no behavioral changes have been made, and this simply extracts the functionality into a class. This also has the benefit of making dependencies on the core timing functionality explicit within the relevant interfaces.
* core: Make the exclusive monitor a unique_ptr instead of a shared_ptrLioncash2018-10-151-2/+2
| | | | | | Like the barrier, this is owned entirely by the System and will always outlive the encompassing state, so shared ownership semantics aren't necessary here.
* arm_interface: Replace kernel vm_manager include with a forward declarationLioncash2018-09-211-0/+4
| | | | | | Avoids an unnecessary inclusion and also uncovers three places where indirect inclusions were relied upon, which allows us to also resolve those.
* arm_interface: Remove ARM11-isms from the CPU interfaceLioncash2018-09-181-6/+4
| | | | | | | | | This modifies the CPU interface to more accurately match an AArch64-supporting CPU as opposed to an ARM11 one. Two of the methods don't even make sense to keep around for this interface, as Adv Simd is used, rather than the VFP in the primary execution state. This is essentially a modernization change that should have occurred from the get-go.
* Port #4182 from Citra: "Prefix all size_t with std::"fearlessTobi2018-09-151-11/+11
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* core: Namespace all code in the arm subdirectory under the Core namespaceLioncash2018-08-251-0/+4
| | | | Gets all of these types and interfaces out of the global namespace.
* arm_dynarmic: Make MakeJit() a const member functionLioncash2018-07-241-1/+1
| | | | | This functions doesn't modify instance state, so it can be a made a const member function.
* exclusive_monitor: Use consistent type alias for u64Lioncash2018-07-241-7/+6
| | | | | Uses the same type aliases we use for virtual addresses, and converts one lingering usage of std::array<uint64_t, 2> to u128 for consistency.
* Implement exclusive monitorMerryMage2018-07-221-1/+29
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* CPU: Save and restore the TPIDR_EL0 system register on every context switch.Subv2018-07-211-0/+2
| | | | Note that there's currently a dynarmic bug preventing this register from being written.
* scheduler: Clear exclusive state when switching contextsMerryMage2018-07-161-0/+1
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* Merge pull request #193 from N00byKing/3184_2_robotic_boogaloobunnei2018-03-191-1/+4
|\ | | | | Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
| * Implements citra-emu/citra#3184N00byKing2018-02-251-1/+4
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* | arm_interface: Support unmapping previously mapped memory.bunnei2018-03-161-1/+1
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* dynarmic: Update to 41ae12263MerryMage2018-02-091-1/+1
| | | | Changes: Primarily implementing more A64 instructions
* yuzu: Update license text to be consistent across project.bunnei2018-01-131-1/+1
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* arm_dynarmic: Implement coreMerryMage2018-01-121-2/+14
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* arm_dynarmic: More cleanup.bunnei2018-01-041-6/+0
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* arm_dynarmic: Gut interface until dynarmic is ready for general use.bunnei2018-01-041-8/+3
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* arm: Remove SkyEye/Dyncom code that is ARMv6-only.bunnei2018-01-031-6/+1
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* Merge remote-tracking branch 'upstream/master' into nxbunnei2017-10-101-4/+13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | # Conflicts: # src/core/CMakeLists.txt # src/core/arm/dynarmic/arm_dynarmic.cpp # src/core/arm/dyncom/arm_dyncom.cpp # src/core/hle/kernel/process.cpp # src/core/hle/kernel/thread.cpp # src/core/hle/kernel/thread.h # src/core/hle/kernel/vm_manager.cpp # src/core/loader/3dsx.cpp # src/core/loader/elf.cpp # src/core/loader/ncch.cpp # src/core/memory.cpp # src/core/memory.h # src/core/memory_setup.h
| * Moved down_count to CoreTimingHuw Pascoe2017-09-301-2/+0
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| * ARM_Interface: Implement PageTableChangedMerryMage2017-09-251-1/+9
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* | arm_interface: Set TLS address for dynarmic core.bunnei2017-09-301-0/+2
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* | arm: Use 64-bit addressing in a bunch of places.bunnei2017-09-301-4/+4
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* arm_dynarmic: CP15 supportMerryMage2017-02-031-1/+1
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* ThreadContext: Move from "core" to "arm_interface".bunnei2016-12-221-6/+2
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* Remove empty newlines in #include blocks.Emmanuel Gil Peyrot2016-09-211-3/+0
| | | | | | | This makes clang-format useful on those. Also add a bunch of forgotten transitive includes, which otherwise prevented compilation.
* arm: ResetContext shouldn't be part of ARM_Interface.bunnei2016-09-151-1/+0
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* arm_dynarmic/arm_dyncom: Remove unnecessary "virtual" keyword.bunnei2016-09-151-1/+1
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* dynarmic: Implement ARM CPU interface.bunnei2016-09-151-0/+51