summaryrefslogtreecommitdiffstats
path: root/src/core/arm/dyncom/arm_dyncom_interpreter.cpp (unfollow)
Commit message (Collapse)AuthorFilesLines
2015-05-21dyncom: Eliminate clang warningsLioncash1-1/+1
Gets rid of a whole load of missing brace initialization warnings.
2015-05-15Memmap: Re-organize memory function in two filesYuri Kunde Schlesner1-1/+1
memory.cpp/h contains definitions related to acessing memory and configuring the address space mem_map.cpp/h contains higher-level definitions related to configuring the address space accoording to the kernel and allocating memory.
2015-05-14dyncom: Add ARMv6K NOP and hint instructions to the decoding tableLioncash1-12/+142
2015-05-14dyncom: Handle some MSR variants individuallyLioncash1-23/+32
This is necessary, as hint instructions will be recognized as MSR, which is pretty bad.
2015-05-14dyncom: Move exclusive load/stores above bbl and swi in the decoding tableLioncash1-10/+11
2015-05-14dyncom: Remove duplicate enums/prototypesLioncash1-7/+1
These are already defined in arm_dyncom_interpreter_dec.cpp.
2015-05-14dyncom: Remove unnecessary definesLioncash1-4/+4
These can simply be const vars.
2015-05-14dyncom: Make translation-unit functions and variables staticLioncash1-66/+64
2015-05-14dyncom: Remove unnecessary typedefsLioncash1-132/+133
2015-05-14dyncom: Remove unused structsLioncash1-8/+0
2015-05-13dyncom: Fix decoding of BKPT's immediateLioncash1-1/+1
A shift here is intended since the representation is imm12:imm4
2015-05-12dyncom: Stub MCRR and MRRCLioncash1-7/+68
There's no other coprocessor outside the VFP (which has its own VMOV variants) in which the MPCore can send/retrieve data from. Stubbed so citra won't crash and burn on the odd chance someone actually tries to use these.
2015-05-08dyncom: Remove an unnecessary variable in the interpreterLioncash1-19/+17
All this was doing was needlessly aliasing a variable.
2015-05-06HLE: Clean up SVC dispatch mechanismYuri Kunde Schlesner1-2/+2
2015-05-02Dyncom: Move cream cache to ARMul_State.bunnei1-22/+9
2015-04-07dyncom: Remove unnecessary enum and typedefLioncash1-4/+4
Also fixes descriptions in the process.
2015-04-06Move CP15 enum definitions into their own enum.Lioncash1-1/+0
Also gets rid of preprocessor mumbo-jumbo
2015-04-06dyncom: Suppress uninitialized variable warningsLioncash1-4/+4
The switch cases will always be hit, but this makes compilers stop complaining.
2015-04-02dyncom: Move CP15 register writing into its own function.Lioncash1-88/+2
Also implements writing to the rest of the ARM11 MPCore CP15 register set.
2015-04-02dyncom: Move CP15 register reading into its own function.Lioncash1-44/+3
Keeps everything contained. Added all supported readable registers in an ARM11 MPCore.
2015-03-26dyncom: Migrate InAPrivilegedMode to armsuppLioncash1-4/+0
It's a generic helper function, so it should be here anyway.
2015-03-24dyncom: Implement SRSLioncash1-1/+32
2015-03-24dyncom: Implement RFELioncash1-1/+30
2015-03-17dyncom: Make Load/Store instructions support big endianLioncash1-52/+62
2015-03-15dyncom: Implement SETENDLioncash1-1/+35
2015-03-10dyncom: Minor cleanupLioncash1-26/+7
Assemblers will exit with an error when trying to assemble instructions with disallowed registers.
2015-03-09dyncom: Fix an indexing bug in STMLioncash1-5/+4
Previously it would write the contents of register 13 for the case where the link register (r14) is supposed to be written.
2015-03-09dyncom: General cleanup of STMLioncash1-16/+14
2015-03-09dyncom: Increment addr when accessing LR in LDMLioncash1-0/+2
2015-03-02Add profiling infrastructure and widgetYuri Kunde Schlesner1-0/+8
2015-02-26arm: The CP15 Main ID register is not writeableLioncash1-3/+1
2015-02-22Cleaned up unaligned access.Kevin Hartman1-17/+2
2015-02-17dyncom: Support conditional BKPT instructionsLioncash1-1/+27
2015-02-16dyncom: Actually set the destination register for USAD8/USADA8.Lioncash1-0/+1
Idiotville: Population: 1 - Inhabitant name: Lioncash
2015-02-13core: Apply static to local functionsLioncash1-189/+190
2015-02-13arm: General cleanupLioncash1-74/+48
- Remove several typedefs for ARMul_State. - Remove unused functions - Remove unused/unnecessary headers - Removed unused enums, etc.
2015-02-13dyncom: Remove warning for SXTAHLioncash1-1/+0
This is tested to work correctly.
2015-02-10dyncom: Add more regs to MCR/MRCLioncash1-17/+32
Adds the registers that were left out of some coprocessor ranges.
2015-02-03dyncom: Remove more unnecessary codeLioncash1-45/+3
2015-02-03core: Fix some warnings on OSXLioncash1-2/+4
2015-02-01arm: Adios armemuLioncash1-4/+0
2015-01-27dyncom: Minor cleanupLioncash1-126/+137
Narrow scopes for the instruction variables. Remove unnecessary parentheses.
2015-01-22dyncom: Minor cleanupLioncash1-282/+270
Removes some unused macros and cleans up indentation inconsistencies
2015-01-20dyncom: Clarify precedence for ternary statementsLioncash1-1/+1
2015-01-19dyncom: Implement missing shifts in ScaledRegisterPostIndexed, etcLioncash1-7/+33
2015-01-17dyncom: Handle the ARM A2 encoding of STRT/LDRTLioncash1-10/+24
These were also missing the shifted register case.
2015-01-17dyncom: Handle the ARM A2 encoding of LDRBT/STRBT.Lioncash1-17/+15
2015-01-12dyncom: Fix 32-bit ASR shifts for immediatesLioncash1-5/+3
2015-01-12dyncom: Remove unused flag macrosLioncash1-15/+3
2015-01-12dyncom: Get rid of unnecessary outer-scope variables in InterpreterMainLoopLioncash1-97/+108
2015-01-12dyncom: Fix overflow flag setting for ADD/RSB/RSC/SUB/SBCLioncash1-38/+41
Also cleans up CMN, and CMP.
2015-01-12dyncom: Add a helper function for addition with a carryLioncash1-12/+9
2015-01-12dyncom: Fix ADC overflow flag settingLioncash1-8/+12
2015-01-12dyncom: Fix conditional execution of MSRLioncash1-29/+31
2015-01-08dyncom: Fix UMAALLioncash1-4/+4
These need to be done as a 64-bit operation.
2015-01-07dyncom: Fix SMULWB/SMULWTLioncash1-10/+7
Wasn't doing proper sign-extension
2015-01-07dyncom: Fix SWPBLioncash1-0/+1
2015-01-07dyncom: Move over SMLALXYLioncash1-1/+56
2015-01-06Added exclusive reservation granule from ARMv7 spec to dyncom to protect LDR/STREX.Kevin Hartman1-5/+7
2015-01-05dyncom: Partially emulate BXJLioncash1-8/+25
Just in case some game studio let the intern write inline assembly or something.
2015-01-05dyncom: Actually set the Q flag for SMLABB/SMLABT/SMLATB/SMLATTLioncash1-1/+2
Easy skyeye todo fix.
2015-01-05dyncom: Implement QADD/QSUB/QDADD/QDSUBLioncash1-8/+103
2015-01-04skyeye: Remove duplicate typedefsLioncash1-4/+4
citra already has its own typedefs like this.
2015-01-03dyncom: Implement SMLAWLioncash1-1/+43
2015-01-03dyncom: Implement REVSHLioncash1-45/+45
Also joins the REV ops into one common place.
2015-01-03dyncom: Implement SMLALD/SMLSLDLioncash1-3/+72
2015-01-03dyncom: Implement SMMLA/SMMUL/SMMLSLioncash1-3/+64
2015-01-03dyncom: Implemented LDREXD/STREXD/LDREXH/STREXHbunnei1-100/+182
2015-01-03dyncom: Remove dead function InterpreterInitInstLengthLioncash1-27/+0
Technically eliminates two memory leaks as well.
2015-01-03dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSDLioncash1-44/+73
2015-01-02dyncom: Implement SXTAB16 and SXTB16Lioncash1-3/+58
2015-01-01dyncom: Implement SHADD8/SHADD16/SHSUB8/SHSUB16/SHASX/SHSAXLioncash1-8/+110
2015-01-01dyncom: Implement SADD8/SSUB8Lioncash1-55/+108
2014-12-31dyncom: Implement UADD8/UADD16/USUB8/USUB16/UASX/USAXLioncash1-9/+208
2014-12-31dyncom: Massive refactorbunnei1-514/+191
2014-12-30dyncom: Implement USAT16/SSAT16Lioncash1-2/+61
2014-12-30dyncom: Implement USAT/SSATbunnei1-2/+94
2014-12-30dyncom: Various cleanups to match coding style, no functional changes.bunnei1-6066/+5168
2014-12-29dyncom: Fix SMLALXY's instruction labelsLioncash1-2/+2
They were erroneously labeled as SMLAL.
2014-12-29dyncom: Implement QADD8/QSUB8Lioncash1-32/+42
2014-12-29dyncom: Implement UXTB16/UXTAB16Lioncash1-2/+55
2014-12-29vfp: Actually make the code somewhat readableLioncash1-8/+41
2014-12-28dyncom: Implement PKHBT and PKHTB.bunnei1-2/+57
2014-12-28dyncom: Implement USAD8/USADA8Lioncash1-2/+52
2014-12-27dyncom: Implement UQADD8, UQADD16, UQSUB8, UQSUB16, UQASX, and UQSAX.Lioncash1-8/+97
2014-12-27dyncom: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAXLioncash1-11/+123
2014-12-22dyncom: Move over QADD16/QASX/QSAX/QSUB16Lioncash1-7/+87
2014-12-22dyncom: Move SEL overLioncash1-1/+58
2014-12-22dyncom: Move over SASX/SSAX/SADD16/SSUB16Lioncash1-7/+102
2014-12-21More warning cleanupsChin1-6/+6
2014-12-19dyncom: Implement UMAALLioncash1-1/+47
2014-12-13Convert old logging calls to new logging macrosYuri Kunde Schlesner1-99/+101
2014-11-29dyncom: Use unordered_map rather than the terrible 2-level bb_mapYuri Kunde Schlesner1-33/+15
Seems (probably just placebo/wishful thinking) to make it slightly faster. Also reduces memory usage and makes shutdown when debugging from MSVC fast.
2014-11-29arm_dyncom_interpreter: Get rid of unused var warningsLioncash1-4/+2
2014-11-29Add comment regarding __WIN32__ in SkyEye codedarkf1-0/+4
2014-11-29Fix MinGW builddarkf1-0/+4
2014-11-12ARM: Removed unnecessary goto with each instruction.bunnei1-43/+39
2014-11-12ARM: Fixed several dyncom bugs.bunnei1-14/+19
- Fixed NZCVT flags to properly save state when function returns. - Fixed counter to keep track of the actual number of instructions executed. - Fixed single-step mode to only execute one instruction at a time. - DefaultIni: Removed comment that no longer applied to dyncom.
2014-10-25ARM: Updated dyncom core to use fast label lookup table on clang.bunnei1-3/+7
2014-10-25ARM: Integrate SkyEye faster "dyncom" interpreter.bunnei1-0/+6559
Fixed typo (make protected member public) Added license header back in. I originally removed this because I mostly rewrote the file, but meh ARM: Fixed a type error in dyncom interpreter. ARM: Updated dyncom to use unique_ptr for internal ARM state.
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-02 17:35:25 +0200