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2015-02-01arm: Clean up ARMul_StateLioncash1-20/+9
2015-02-01arm: Adios armemuLioncash8-7751/+56
2015-01-30arm: Throw out a lot of unnecessary codeLioncash3-1257/+36
2015-01-19Cleanup: Logging in CoreChin1-51/+6
2015-01-12dyncom: Add a helper function for addition with a carryLioncash1-0/+16
2015-01-09Move ThreadContext to core/core.h and deal with the falloutYuri Kunde Schlesner2-4/+6
2015-01-05dyncom: Implement QADD/QSUB/QDADD/QDSUBLioncash1-12/+8
2015-01-03armemu: Fix missing Q flag check for SMLSD.Lioncash1-2/+6
2015-01-03dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSDLioncash2-5/+9
2015-01-01Fix SADD8/SSUB8 in the armemuLioncash1-50/+28
2014-12-30dyncom: Implement USAT/SSATbunnei1-0/+35
2014-12-29armemu: Implement QADD8/QSUB8Lioncash2-33/+95
2014-12-28armemu: Fix PKHTB to do an arithmetic shift and correctly decode immediate field.bunnei1-13/+5
2014-12-28armemu: Simplify SSAT/SSAT16/SXTB/SXTABLioncash1-71/+48
2014-12-28armemu: Simplify REV/REV16/SXTH/SXTAHLioncash1-38/+26
2014-12-28armemu: Simplify USAT16/UXTB/UXTABLioncash1-65/+42
2014-12-28armemu: Simplify REVSH/UXTH/UXTAHLioncash1-48/+23
2014-12-28armemu: Fix underflows in USAD8/USADA8Lioncash2-4/+13
2014-12-27armemu: Implement UQADD8, UQADD16, UQSUB16, UQASX, and UQSAXLioncash2-19/+89
2014-12-27armemu: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAXLioncash1-2/+73
2014-12-26ARM: Add a mechanism for faking CPU time elapsed during HLE.bunnei2-46/+11
2014-12-25armemu: Implement SMMUL, SMMLA, and SMMLS.Lioncash1-2/+30
2014-12-24armemu: Implement SMLALD/SMLSLDLioncash1-2/+33
2014-12-24armemu: Fix GE/Q flag setting semanticsLioncash1-62/+56
2014-12-23armemu: Set the Q flag correctly for much of the other opsLioncash1-8/+8
2014-12-23armemu: Set the Q flag properly for SMLAD/SMUADLioncash2-13/+27
2014-12-23armemu: Properly set the Q flag for SSAT16/USAT16 upon saturation.Lioncash1-9/+23
2014-12-23armemu: Fix SELLioncash1-1/+1
2014-12-23armemu: Fix construction of the CPSRLioncash2-11/+49
2014-12-23armemu: Fix retrieval of the CPSR in MRS instructions.Lioncash1-1/+1
2014-12-21License changepurpasmart962-2/+2
2014-12-21armemu: Implement SADD8/SSUB8Lioncash1-14/+87
2014-12-20armemu: Should be using labs for USAD8/USADA8Lioncash1-4/+4
2014-12-19armemu: Implement QASX and QSAXLioncash1-7/+20
2014-12-19armemu: Implement SMLSDLioncash1-6/+10
2014-12-19armemu: Implement USAD8 and USADA8Lioncash1-1/+24
2014-12-19armemu: Fix SSAT16Lioncash1-1/+1
2014-12-19armemu: Clean up naming and formatting for SSAT16Lioncash1-14/+20
2014-12-18armemu: Fix lower-bounds clamping for USAT16Lioncash1-1/+6
2014-12-18armemu: More concise names for USAT16-related variablesLioncash1-11/+15
2014-12-18armemu: Get rid of bitwise parenthesis warningsLioncash1-4/+4
2014-12-18armemu: Set GE flags correctly for SSUB16, SADD16, SSAX, and SASX.Lioncash1-4/+29
2014-12-18armemu: Combine SSUB16, SADD16, SASX, and SSAX.Lioncash1-34/+23
2014-12-17armemu: Unset GE flags for UADD8 if results are < 0x100Lioncash1-4/+22
2014-12-17armemu: Fix SSUB16Lioncash1-8/+8
2014-12-17armemu: Implement UMAALLioncash1-3/+25
2014-12-17armemu: Narrow the scope of some variables in handle_v6_insnLioncash1-12/+9
2014-12-17armemu: Fix SADD16Lioncash1-8/+9
2014-12-17armemu: Fix PKHTBNormmatt1-6/+12
2014-12-17armemu: Implement REVSHNormmatt1-5/+9
2014-12-17armemu: Fix UXTAB/UXTAHNormmatt1-4/+4
2014-12-17armemu: Fix SXTABNormmatt1-2/+2
2014-12-17armemu: Fix SXTAHNormmatt1-2/+3
2014-12-16armemu: Fix SMUAD, SMUSD, and SMLADLioncash1-3/+3
2014-12-16armemu: Join SMUAD, SMUSD, and SMLADLioncash1-38/+35
2014-12-16armemu: Fix lower-bound signed saturation clamping for QADD16/QSUB16.Lioncash1-2/+2
2014-12-16armemu: Join QADD16 and QSUB16 together.Lioncash1-33/+37
2014-12-16armemu: Implement UXTAB16Lioncash1-10/+25
2014-12-15armemu: Fix UXTB16Lioncash1-12/+12
2014-12-15ARM: Pull some SkyEye fixes from 3dmoo.bunnei1-415/+481
2014-12-13Convert old logging calls to new logging macrosYuri Kunde Schlesner3-7/+7
2014-12-08armemu: Fix SSAXLioncash1-1/+1
2014-12-08armemu: Fix SASXLioncash1-1/+1
2014-12-08armemu: Fix parenthesis warnings regarding bitwise opsLioncash1-4/+4
2014-11-19Remove trailing spaces in every file but the ones imported from SkyEye, AOSP or generatedEmmanuel Gil Peyrot2-3/+3
2014-11-18Fix documentation of parametersLioncash1-1/+1
2014-11-02ARM: Merged additional ARMv6 instructions implemented by 3dmoo.bunnei1-42/+234
2014-10-26Add `override` keyword through the code.Yuri Kunde Schlesner1-11/+11
2014-10-25ARM: Removed unnecessary and unused SkyEye MMU code.bunnei18-7609/+326
2014-10-25ARM: Removed unused armos code from SkyEye.bunnei3-746/+0
2014-10-25ARM: Integrate SkyEye faster "dyncom" interpreter.bunnei2-12/+5
2014-10-25ARM: Reorganized file structure to move shared SkyEye code to a more common area.bunnei31-11069/+36
2014-09-06core: Make the ARM disassembler use std::string internallyLioncash1-6/+3
2014-08-31Threading: Fix thread starting to execute first instruction correctly.bunnei1-1/+1
2014-08-28Threading: Fix thread starting to execute first instruction correctly.bunnei1-1/+1
2014-08-20ARM: Remove a forgotten const in vfp.Emmanuel Gil Peyrot2-2/+2
2014-07-24ARM: Synchronize Citra's SkyEye core with 3dmoo's.bunnei6-5919/+5303
2014-07-20core: Kill off type redefenitions in armdefs.hLioncash1-7/+0
2014-06-05arm: fixed a bug where ARM_Interpreter::ExecuteInstructions was actually executing one more instruction than expectedbunnei1-1/+1
2014-06-05arm: fixed bug in how thread context switch occurs with SkyEyebunnei1-2/+5
2014-06-05arm: reverting a change made with cb0663de - this has to have been a typo!bunnei1-1/+1
2014-06-02arm: added option to prepare CPU core (while mid-instruction) for thread reschedulebunnei2-0/+8
2014-05-30arm: removed unnecessary code when calling SVC from skyeyebunnei1-16/+0
2014-05-23arm_interpreter: fixed load context to currently resume a threadbunnei1-1/+4
2014-05-21arm: removed include of windows.h from armdefs.h to arminit.c (only module that uses it)bunnei2-4/+3
2014-05-21armemu: missed rename of "Syscall" to "SVC"bunnei1-1/+1
2014-05-21ARM_Interpreter/ARM_Interface: Fixed member variable naming to be consistent with style guidebunnei2-40/+40
2014-05-21ARM_Interface: added SaveContext and LoadContext functions for HLE thread switchingbunnei2-0/+48
2014-05-20VFP: disable DBG messages because they spam the console with unimportant skyeye junkbunnei1-1/+1
2014-05-17Fixed vfp issuesarchshift4-10/+10
2014-05-17ignore thumbemu 0xDEADCODE debugging catch on MCRbunnei1-2/+1
2014-05-17updated how we call ARM core to make things much fasterbunnei4-15/+14
2014-05-17same fix as last commit - just for vfpsingle.cppbunnei1-2/+2
2014-05-17another VFP fix for GCCbunnei1-2/+2
2014-05-17fixed VFP DBG log for GCCbunnei1-1/+1
2014-05-17- reenabled MCR and MRC functions now that VFP is attachedbunnei2-95/+92
2014-05-17- removed unused stubbed out codebunnei5-33/+27
2014-05-16added maverick.cpp to ARM core from skyeyebunnei1-0/+1206
2014-05-16fixed includesbunnei1-2/+2
2014-05-16enabled CP_ACCESS_ALLOWEDbunnei1-6/+4
2014-05-16fixed include pathbunnei1-1/+1
2014-05-16removed undefined function ARMul_ConsolePrintbunnei1-1/+1
2014-05-16added missing armcopro from skyeyebunnei3-251/+1093
2014-05-16added missing skyeye mmu codebunnei9-17/+3272
2014-05-16fixed armmmu importsbunnei1-5/+5
2014-05-16- moved mmu to arm/interpreter folderbunnei13-0/+10304
2014-05-12added option to set CPSR register to arm_interfacebunnei2-0/+14
2014-05-07- disable strict alignment on LDRD/STRDbunnei1-17/+22
2014-05-02- added CallMCR function to coprocessor HLE modulebunnei1-22/+23
2014-05-02renamed hle "mrc" module to "coprocessor"bunnei1-8/+8
2014-04-28removed DISALLOW_COPY_AND_ASSIGN in favor of NonCopyable classbunnei1-1/+0
2014-04-28removed commented out line - this was for an unimplemented MRC call, no longer need to leave this herebunnei1-1/+0
2014-04-25moved HLE::MRC to its own module, added support for catching data synchronization barrier commandbunnei2-3/+5
2014-04-25added disassembly to unimplemented instructionbunnei1-1/+6
2014-04-23fixes to build on linuxbunnei1-0/+2
2014-04-13- added HLE to connect to "srv:" servicebunnei1-33/+35
2014-04-12hacked CPU interpreter to ignore branch on SVC instruction (as we are HLEing this...)bunnei1-2/+6
2014-04-12added a SETABORT method that does not update LR (for HLE'd SVC that does not jump appcore CPU to an IRQ vector)bunnei1-0/+11
2014-04-11base code to call a syscall from ARM11 appcorebunnei1-0/+3
2014-04-11cleaned up arm_interface, added a setter to set registers for use with HLE return valuesbunnei2-6/+70
2014-04-09fixed licensing and updated code style naming for arm_interface/arm_interpreter frontend modulebunnei2-85/+46
2014-04-09fixed project includes to use new directory structurebunnei7-21/+20
2014-04-09got rid of 'src' folders in each sub-projectbunnei16-0/+12762
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