| Commit message (Collapse) | Author | Files | Lines |
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StorageAtomicExchangeU64 is failing test seemingly due to failure storing 64-bit
result into the register
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Use a struct constructor to serialize register allocation arguments to
ensure registers are allocated in the same order regardless of the
compiler used.
The A and B functions can be called in any order when passed as
arguments to "foo":
foo(A(), B())
But the order is guaranteed for curly-braced constructor calls in
classes:
Foo{A(), B()}
Use this to get consistent behavior.
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also fixes ADD and SUB to use U modifier
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Along with implementations of common instructions along the way
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This is enabled by an extension instead of the capability.
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Workaround bug on Nvidia's OpenGL SPIR-V compiler when using unsigned
texture offsets.
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Workaround more bugs on Nvidia's OpenGL SPIR-V compiler.
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Worksaround a bug on Nvidia's OpenGL SPIR-V compiler where names are
used for name matching.
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When we can't track the SSBO origin of a global memory instruction,
leave it as a global memory operation and assume these pointers are in
the NVN storage buffer slots, then apply a linear search in the shader's
runtime.
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Fix two bugs in BFI.
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Mostly fixing unused *, implicit conversion, braced scalar init,
fpermissive, and some others.
Some Clang errors likely remain in video_core, and std::ranges is still
a pertinent issue in shader_recompiler
shader_recompiler: cmake: Force bracket depth to 1024 on Clang
Increases the maximum fold expression depth
thread_worker: Include condition_variable
Don't use list initializers in control flow
Co-authored-by: ReinUsesLisp <reinuseslisp@airmail.cc>
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It may generate better code on some compilers and it's easier to handle.
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This is needed because pseudo-instructions where invalidated.
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Also fix oversight with adding SignedZeroInfNanPreserve execution mode.
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And add a const in FCMP
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still need to configure some settings for NV denorm flush and intel NaN
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