anonymous/yuzu - yuzu is the world's most popular, open-source, Nintendo Switch emulator — started by the creators of Citra. It is written in C++ with portability in mind,

	Commit message (Collapse)	Author	Files	Lines
2023-01-26	shader_recompiler: Remove S32 IR type	ameerj	1	-3/+0
	The frontend IR opcodes do not distinguish between signed and unsigned integer types. Fixes broken shaders when IR validation/graphics debugging is enabled for shaders that used BitCastS32F32
2022-11-04	video_core: Fix SNORM texture buffer emulating error (#9001)	Feng Chen	1	-0/+3

2022-04-23	general: Convert source file copyright comments over to SPDX	Morph	1	-3/+2
	This formats all copyright comments according to SPDX formatting guidelines. Additionally, this resolves the remaining GPLv2 only licensed files by relicensing them to GPLv2.0-or-later.
2022-03-20	shader_recompiler: Reduce unused includes	ameerj	1	-1/+0

2021-07-23	glasm: Rework control flow introducing a syntax list	ReinUsesLisp	1	-8/+0
	This commit regresses VertexA shaders, their transformation pass has to be adapted to the new control flow.
2021-07-23	shader: Inline common Value getters	ReinUsesLisp	1	-107/+0

2021-07-23	shader: Inline common Value functions into the header	ReinUsesLisp	1	-19/+0

2021-07-23	shader: Move microinstruction header to the value header	ReinUsesLisp	1	-1/+0

2021-07-23	shader: Implement tessellation shaders, polygon mode and invocation id	ReinUsesLisp	1	-0/+9

2021-07-23	shader_recompiler,video_core: Cleanup some GCC and Clang errors	lat9nq	1	-2/+2
	Mostly fixing unused *, implicit conversion, braced scalar init, fpermissive, and some others. Some Clang errors likely remain in video_core, and std::ranges is still a pertinent issue in shader_recompiler shader_recompiler: cmake: Force bracket depth to 1024 on Clang Increases the maximum fold expression depth thread_worker: Include condition_variable Don't use list initializers in control flow Co-authored-by: ReinUsesLisp <reinuseslisp@airmail.cc>
2021-07-23	shader: Store type of phi nodes in flags	ReinUsesLisp	1	-1/+5
	This is needed because pseudo-instructions where invalidated.
2021-07-23	shader: Refactor PTP and other minor changes	ReinUsesLisp	1	-14/+0

2021-07-23	shader: Implement TLD4.PTP	FernandoS27	1	-0/+14

2021-07-23	shader: Implement DADD	ameerj	1	-0/+8

2021-07-23	shader: Fix control flow	ReinUsesLisp	1	-1/+5

2021-07-23	shader: Add utility to resolve identities on a value	ReinUsesLisp	1	-0/+7

2021-07-23	shader: Add pools and rename files	ReinUsesLisp	1	-1/+1

2021-07-23	shader: Make typed IR	ReinUsesLisp	1	-0/+28

2021-07-23	shader: Constant propagation and global memory to storage buffer	ReinUsesLisp	1	-2/+15

2021-07-23	shader: SSA and dominance	ReinUsesLisp	1	-0/+37

2021-07-23	shader: Initial recompiler work	ReinUsesLisp	1	-0/+124