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2020-12-07video_core: Remove unnecessary enum class casting in logging messagesLioncash1-4/+2
fmt now automatically prints the numeric value of an enum class member by default, so we don't need to use casts any more. Reduces the line noise a bit.
2020-11-20shader_bytecode: Make use of [[nodiscard]] where applicableLioncash1-73/+79
Ensures that all queried values are made use of.
2020-11-20shader_bytecode: Eliminate variable shadowingLioncash1-15/+17
2020-10-28shader/arithmetic: Implement FCMP immediate + register variantReinUsesLisp1-0/+2
Trivially add the encoding for this.
2020-06-23shader/half_set: Implement HSET2_IMMReinUsesLisp1-0/+8
Add HSET2_IMM. Due to the complexity of the encoding avoid using BitField unions and read the relevant bits from the code itself. This is less error prone.
2020-05-09shader_ir: Separate float-point comparisons in ordered and unorderedReinUsesLisp1-12/+16
This allows us to use native SPIR-V instructions without having to manually check for NAN.
2020-04-26shader/arithmetic_integer: Implement IADD.XReinUsesLisp1-0/+4
IADD.X takes the carry flag and adds it to the result. This is generally used to emulate 64-bit operations with 32-bit registers.
2020-04-24Fix -Wdeprecated-copy warning.Markus Wick1-0/+1
2020-04-23decode/arithmetic_half: Fix HADD2 and HMUL2 absolute and negation bitsReinUsesLisp1-2/+0
The encoding for negation and absolute value was wrong. Extracting is now done manually. Similar instructions having different encodings is the rule, not the exception. To keep sanity and readability I preferred to extract the desired bit manually. This is implemented against nxas: https://github.com/ReinUsesLisp/nxas/blob/8dbc38995711cc12206aa370145a3a02665fd989/table.h#L68 That is itself tested against nvdisasm (Nvidia's official disassembler).
2020-04-16CMakeLists: Specify -Wextra on linux buildsLioncash1-1/+1
Allows reporting more cases where logic errors may exist, such as implicit fallthrough cases, etc. We currently ignore unused parameters, since we currently have many cases where this is intentional (virtual interfaces). While we're at it, we can also tidy up any existing code that causes warnings. This also uncovered a few bugs as well.
2020-04-15shader/arithmetic: Add FCMP_CR variantReinUsesLisp1-2/+4
Adds another variant of FCMP.
2020-04-12shader/video: Partially implement VMNMXReinUsesLisp1-0/+55
Implements the common usages for VMNMX. Inputs with a different size than 32 bits are not supported and sign mismatches aren't supported either. VMNMX works as follows: It grabs Ra and Rb and applies a maximum/minimum on them (this is defined by .MX), having in mind the input sign. This result can then be saturated. After the intermediate result is calculated, it applies another operation on it using Rc. These operations are merges, accumulations or another min/max pass. This instruction allows to implement with a more flexible approach GCN's min3 and max3 instructions (for instance).
2020-04-07shader/conversion: Implement I2I sign extension, saturation and selectionReinUsesLisp1-1/+1
Reimplements I2I adding sign extension, saturation (clamp source value to the destination), selection and destination sizes that are not 32 bits wide. It doesn't implement CC yet.
2020-04-06shader/memory: Implement RED.E.ADDReinUsesLisp1-0/+8
Implements a reduction operation. It's an atomic operation that doesn't return a value. This commit introduces another primitive because some shading languages might have a primitive for reduction operations.
2020-04-04shader_bytecode: Rename MOV_SYS to S2RReinUsesLisp1-2/+2
2020-04-04shader_bytecode: Add encoding for BARReinUsesLisp1-0/+2
2020-04-04shader_bytecode: Add encoding for VOTE.VTGReinUsesLisp1-0/+2
2020-03-30shader_decode: merge GlobalAtomicOp to AtomicOpnamkazy1-13/+1
2020-03-28shader_bytecode: Fix I2I_IMM encodingReinUsesLisp1-1/+1
2020-03-16shader/shader_ir: Track usage in input attribute and of legacy varyingsReinUsesLisp1-0/+6
2020-03-13shader_bytecode: update BFE instructions struct.Nguyen Dac Nam1-8/+3
2020-02-05shader/decode: Fix constant buffer offsetsReinUsesLisp1-2/+2
Some instances were using cbuf34.offset instead of cbuf34.GetOffset(). This returned the an invalid offset. Address those instances and rename offset to "shifted_offset" to avoid future bugs.
2020-02-02shader/shift: Implement SHF_LEFT_{IMM,R}ReinUsesLisp1-0/+20
Shifts a pair of registers to the left and returns the high register.
2020-01-27shader/bfi: Implement register-constant buffer variantReinUsesLisp1-0/+2
It's the same as the variant that was implemented, but it takes the operands from another source.
2020-01-27shader/arithmetic: Implement FCMPReinUsesLisp1-0/+7
Compares the third operand with zero, then selects between the first and second.
2020-01-26shader/memory: Implement ATOM.ADDReinUsesLisp1-0/+30
ATOM operates atomically on global memory. For now only add ATOM.ADD since that's what was found in commercial games. This asserts for ATOM.ADD.S32 (handling the others as unimplemented), although ATOM.ADD.U32 shouldn't be any different. This change forces us to change the default type on SPIR-V storage buffers from float to uint. We could also alias the buffers, but it's simpler for now to just use uint. While we are at it, abstract the code to avoid repetition.
2020-01-16shader/memory: Implement ATOMS.ADD.U32ReinUsesLisp1-3/+34
2019-12-20shader/r2p: Refactor P2R to support P2RReinUsesLisp1-1/+3
2019-12-18shader_bytecode: Fix TLD4S encodingReinUsesLisp1-1/+1
2019-12-16shader/texture: Implement TLD4.PTPReinUsesLisp1-6/+6
2019-12-12Shader_Ir: Correct TLD4S encoding and implement f16 flag.Fernando Sahmkow1-1/+2
2019-12-10shader: Implement MEMBAR.GLReinUsesLisp1-1/+17
Implement using memoryBarrier in GLSL and OpMemoryBarrier on SPIR-V.
2019-12-10shader_ir/memory: Implement patch storesReinUsesLisp1-1/+2
2019-12-07shader_bytecode: Remove corrupted characterReinUsesLisp1-1/+1
2019-11-14Shader_IR: Implement TXD instruction.Fernando Sahmkow1-0/+20
2019-11-14Shader_IR: Implement FLO instruction.Fernando Sahmkow1-0/+6
2019-11-14Shader_Bytecode: Add encodings for FLO, SHF and TXDFernando Sahmkow1-0/+18
2019-11-08video_core: Silence implicit conversion warningsReinUsesLisp1-5/+7
2019-11-08shader_ir/warp: Implement FSWZADDReinUsesLisp1-0/+10
2019-10-30Shader_IR: Fix TLD4 and add Bindless Variant.Fernando Sahmkow1-1/+29
This commit fixes an issue where not all 4 results of tld4 were being written, the color component was defaulted to red, among other things. It also implements the bindless variant.
2019-10-24shader_bytecode: Make Matcher constexpr capableLioncash1-13/+13
Greatly shrinks the amount of generated code for GetDecodeTable(). Collapses an assembly output of 9000+ lines down to ~3621 with Clang, and 6513 down to ~2616 with GCC, given it's now allowed to construct all the entries as a sequence of constant data.
2019-09-21gl_shader_decompiler: Use uint for images and fix SUATOMReinUsesLisp1-2/+2
In the process remove implementation of SUATOM.MIN and SUATOM.MAX as these require a distinction between U32 and S32. These have to be implemented with imageCompSwap loop.
2019-09-21shader/image: Implement SULD and remove irrelevant codeReinUsesLisp1-1/+1
* Implement SULD as float. * Remove conditional declaration of GL_ARB_shader_viewport_layer_array.
2019-09-21shader_bytecode: Add SULD encodingReinUsesLisp1-0/+2
2019-09-21Shader_IR: ICMP corrections and fixesFernando Sahmkow1-0/+2
2019-09-20Shader_IR: Implement ICMP.Fernando Sahmkow1-0/+11
2019-09-17shader_ir/warp: Implement SHFLReinUsesLisp1-0/+18
2019-09-11shader/image: Implement SUATOM and fix SUSTReinUsesLisp1-0/+32
2019-09-04shader/shift: Implement SHR wrapped and clamped variantsReinUsesLisp1-0/+4
Nvidia defaults to wrapped shifts, but this is undefined behaviour on OpenGL's spec. Explicitly mask/clamp according to what the guest shader requires.
2019-08-28shader_ir/conversion: Split int and float selector and implement F2F H1ReinUsesLisp1-1/+8
2019-08-28shader_ir/conversion: Implement F2I F16 Ra.H1ReinUsesLisp1-2/+1
2019-08-28float_set_predicate: Add missing negation bit for the second operandReinUsesLisp1-0/+1
2019-08-21shader_ir: Implement VOTEReinUsesLisp1-0/+16
Implement VOTE using Nvidia's intrinsics. Documentation about these can be found here https://developer.nvidia.com/reading-between-threads-shader-intrinsics Instead of using portable ARB instructions I opted to use Nvidia intrinsics because these are the closest we have to how Tegra X1 hardware renders. To stub VOTE on non-Nvidia drivers (including nouveau) this commit simulates a GPU with a warp size of one, returning what is meaningful for the instruction being emulated: * anyThreadNV(value) -> value * allThreadsNV(value) -> value * allThreadsEqualNV(value) -> true ballotARB, also known as "uint64_t(activeThreadsNV())", emits VOTE.ANY Rd, PT, PT; on nouveau's compiler. This doesn't match exactly to Nvidia's code VOTE.ALL Rd, PT, PT; Which is emulated with activeThreadsNV() by this commit. In theory this shouldn't really matter since .ANY, .ALL and .EQ affect the predicates (set to PT on those cases) and not the registers.
2019-08-04shader_ir: Implement NOPReinUsesLisp1-0/+7
2019-07-20Shader_Ir: Implement F16 Variants of F2F, F2I, I2F.Fernando Sahmkow1-2/+0
This commit takes care of implementing the F16 Variants of the conversion instructions and makes sure conversions are done.
2019-07-20shader/half_set_predicate: Implement missing HSETP2 variantsReinUsesLisp1-6/+20
2019-07-09shader_ir: Implement BRX & BRA.CCFernando Sahmkow1-0/+16
2019-07-08gl_shader_decompiler: Implement gl_ViewportIndex and gl_Layer in vertex shadersReinUsesLisp1-1/+1
This commit implements gl_ViewportIndex and gl_Layer in vertex and geometry shaders. In the case it's used in a vertex shader, it requires ARB_shader_viewport_layer_array. This extension is available on AMD and Nvidia devices (mesa and proprietary drivers), but not available on Intel on any platform. At the moment of writing this description I don't know if this is a hardware limitation or a driver limitation. In the case that ARB_shader_viewport_layer_array is not available, writes to these registers on a vertex shader are ignored, with the appropriate logging.
2019-07-07shader/texture: Add F16 support for TLDSReinUsesLisp1-1/+2
2019-06-24shader_bytecode: Include missing <array>ReinUsesLisp1-0/+1
2019-06-21shader: Decode SUST and implement backing image functionalityReinUsesLisp1-2/+64
2019-06-21shader: Implement texture buffersReinUsesLisp1-0/+16
2019-06-04shader_bytecode: Mark EXIT as flow instructionFernando Sahmkow1-1/+1
2019-05-21shader/memory: Implement ST (generic memory)ReinUsesLisp1-0/+1
2019-05-21shader/memory: Implement LD (generic memory)ReinUsesLisp1-4/+15
2019-05-03shader_ir/other: Implement IPA.IDXReinUsesLisp1-0/+1
2019-05-03shader_ir/memory: Implement physical input attributesReinUsesLisp1-0/+4
2019-05-03shader_bytecode: Add AL2P decodingReinUsesLisp1-2/+15
2019-04-16Do some corrections in conversion shader instructions.Fernando Sahmkow1-7/+20
Corrects encodings for I2F, F2F, I2I and F2I Implements Immediate variants of all four conversion types. Add assertions to unimplemented stuffs.
2019-04-14shader_ir: Implement STG, keep track of global memory usage and flushReinUsesLisp1-0/+6
2019-04-08Correct LOP_IMN encodingFernando Sahmkow1-1/+1
2019-04-08Correct XMAD mode, psl and high_b on different encodings.Fernando Sahmkow1-0/+3
2019-04-08Move ConstBufferAccessor to Maxwell3d, correct mistakes and clang format.Fernando Sahmkow1-1/+1
2019-04-08Implement TXQ_BFernando Sahmkow1-0/+2
2019-04-08Corrections to TEX_BFernando Sahmkow1-0/+32
2019-04-08Implement Bindless Samplers and TEX_B in the IR.Fernando Sahmkow1-0/+2
2019-04-03shader_ir/memory: Reduce severity of LD_L cache management and log itReinUsesLisp1-0/+7
2019-04-03shader_ir/memory: Reduce severity of ST_L cache management and log itReinUsesLisp1-1/+8
2019-03-06video_core/engines: Remove unnecessary includesLioncash1-1/+0
Removes a few unnecessary dependencies on core-related machinery, such as the core.h and memory.h, which reduces the amount of rebuilding necessary if those files change. This also uncovered some indirect dependencies within other source files. This also fixes those.
2019-02-26shader/decode: Remove extras from MetaTextureReinUsesLisp1-4/+4
2019-02-26shader/decode: Split memory and texture instructions decodingReinUsesLisp1-8/+9
2019-02-14shader_decompiler: Improve Accuracy of Attribute Interpolation.Fernando Sahmkow1-3/+3
2019-02-11Corrected F2I None mode to RoundEven.Fernando Sahmkow1-1/+1
2019-02-04Update src/video_core/engines/shader_bytecode.hMat M1-1/+1
Co-Authored-By: FernandoS27 <fsahmkow27@gmail.com>
2019-02-03Fix TXQ not using the component mask.Fernando Sahmkow1-0/+4
2019-02-03shader_bytecode: Rename BytesN enums to BitsNReinUsesLisp1-3/+3
2019-01-30shader_ir: Unify constant buffer offset valuesReinUsesLisp1-0/+8
Constant buffer values on the shader IR were using different offsets if the access direct or indirect. cbuf34 has a non-multiplied offset while cbuf36 does. On shader decoding this commit multiplies it by four on cbuf34 queries.
2019-01-30shader_decode: Implement LDG and basic cbuf trackingReinUsesLisp1-0/+8
2019-01-15shader_decode: Implement VMAD and VSETPReinUsesLisp1-2/+3
2019-01-15shader_decode: Implement HFMA2ReinUsesLisp1-0/+1
2019-01-15shader_decode: Fixup clang-formatReinUsesLisp1-1/+1
2019-01-15shader_ir: Initial implementationReinUsesLisp1-0/+4
2019-01-15shader_bytecode: Fixup encodingReinUsesLisp1-1/+1
2018-12-26shader_bytecode: Fixup TEXS.F16 encodingReinUsesLisp1-1/+1
2018-12-19Fixed uninitialized memory due to missing returns in canaryDavid Marcec1-0/+2
Functions which are suppose to crash on non canary builds usually don't return anything which lead to uninitialized memory being used.
2018-12-18shader_bytecode: Fixup half float's operator B encodingReinUsesLisp1-1/+1
2018-12-17Implement postfactor multiplication/division for fmul instructionsheapo1-1/+1
2018-12-05gl_shader_decompiler: Implement TEXS.F16ReinUsesLisp1-1/+2
2018-11-23Added predicate comparison LessEqualWithNan (#1736)Hexagon121-0/+1
* Added predicate comparison LessEqualWithNan * oops * Clang fix
2018-11-23gl_shader_decompiler: Implement clip distancesReinUsesLisp1-0/+2
2018-11-22gl_shader_decompiler: Rename control codes to condition codesReinUsesLisp1-4/+3
2018-11-21gl_shader_decompiler: Implement BFI_IMM_RReinUsesLisp1-0/+3
2018-11-21gl_shader_decompiler: Implement R2P_IMMReinUsesLisp1-0/+14
2018-10-30Assert Control Codes GenerationFernandoS271-1/+5
2018-10-30global: Use std::optional instead of boost::optional (#1578)Frederic L1-4/+4
* get rid of boost::optional * Remove optional references * Use std::reference_wrapper for optional references * Fix clang format * Fix clang format part 2 * Adressed feedback * Fix clang format and MacOS build
2018-10-29Assert Control Flow Instructions using Control CodesFernandoS271-1/+2
2018-10-24Implemented LD_L and ST_LFernandoS271-0/+31
2018-10-23Implement PointSizeFernandoS271-0/+1
2018-10-23gl_shader_decompiler: Implement VSETPReinUsesLisp1-0/+2
2018-10-23gl_shader_decompiler: Abstract VMAD into a video subsetReinUsesLisp1-3/+13
2018-10-23Added Saturation to FMUL32IFernandoS271-0/+4
2018-10-22Fixed FSETP and FSETFernandoS271-2/+0
2018-10-18gl_shader_decompiler: Implement PBK and BRKReinUsesLisp1-3/+7
2018-10-15shader_bytecode: Add Control Code enum 0xfReinUsesLisp1-1/+1
Control Code 0xf means to unconditionally execute the instruction. This value is passed to most BRA, EXIT and SYNC instructions (among others) but this may not always be the case.
2018-10-15gl_shader_decompiler: Implement HSET2_RReinUsesLisp1-0/+18
2018-10-15gl_shader_decompiler: Implement HSETP2_RReinUsesLisp1-0/+20
2018-10-15gl_shader_decompiler: Implement HFMA2 instructionsReinUsesLisp1-0/+32
2018-10-15gl_shader_decompiler: Implement HADD2_IMM and HMUL2_IMMReinUsesLisp1-0/+30
2018-10-15gl_shader_decompiler: Implement non-immediate HADD2 and HMUL2 instructionsReinUsesLisp1-0/+25
2018-10-15gl_shader_decompiler: Setup base for half float unpacking and settingReinUsesLisp1-0/+20
2018-10-11gl_shader_decompiler: Implement VMADReinUsesLisp1-0/+36
2018-10-07gl_shader_decompiler: Implement geometry shadersReinUsesLisp1-0/+112
2018-09-21shader_bytecode: Lay out the Ipa-related enums betterLioncash1-2/+12
This is more consistent with the surrounding enums.
2018-09-21shader_bytecode: Make operator== and operator!= of IpaMode const qualifiedLioncash1-6/+7
These don't affect the state of the struct and can be const member functions.
2018-09-17Implemented I2I.CC on the NEU control code, used by SMOFernandoS271-1/+1
2018-09-17Implemented CSETPFernandoS271-0/+11
2018-09-17Implemented Control CodesFernandoS271-0/+36
2018-09-17Added texture misc modes to texture instructionsFernandoS271-1/+147
2018-09-15Shaders: Implemented multiple-word loads and stores to and from attribute memory.Subv1-1/+9
This seems to be an optimization performed by nouveau.
2018-09-15Port #4182 from Citra: "Prefix all size_t with std::"fearlessTobi1-9/+9
2018-09-12Implemented Texture Processing ModesFernandoS271-0/+10
2018-09-11Implemented encodings for LEA and PSETFernandoS271-0/+64
2018-09-10Implemented TMMLFernandoS271-5/+19
2018-09-09Implemented TXQ dimension query type, used by SMO.FernandoS271-1/+16
2018-09-09Change name of TEXQ to TXQ, in order to match NVIDIA's namingFernandoS271-2/+2
2018-09-06Implemented IPA ProperlyFernandoS271-0/+12
2018-09-01Removed saturate assertDavid Marcec1-1/+0
Unneeded as we already implement it
2018-09-01Removed saturate assertDavid Marcec1-1/+0
Saturate already implemented
2018-09-01Added FMUL assertsDavid Marcec1-0/+5
2018-09-01Added FFMA assertsDavid Marcec1-0/+4
2018-09-01Added assert for TEXS nodepDavid Marcec1-0/+1
2018-09-01Added better asserts to IPA, Renamed IPA modes to match mesaDavid Marcec1-2/+5
IpaMode is changed to IpaInterpMode IpaMode is suppose to be 2 bits not 3 Added IpaSampleMode Added Saturate Renamed modes based on https://github.com/mesa3d/mesa/blob/d27c7918916cdc8092959124955f887592e37d72/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp#L2530
2018-08-31Added predicate comparison GreaterEqualWithNanHexagon121-0/+1
2018-08-31gl_shader_decompiler: Implement POPC (#1203)Laku1-0/+10
* Implement POPC * implement invert
2018-08-29Shaders: Implemented IADD3tech4me1-1/+23
2018-08-29gl_shader_decompiler: Improve IPA for Pass mode with Position attribute.bunnei1-0/+6
2018-08-24fix SEL_IMM bitstringLaku1-1/+1
2018-08-23Shaders: Added decodings for IADD3 instructionstech4me1-0/+6
2018-08-22implement lop3Laku1-0/+19
2018-08-21shader_bytecode: Parenthesize conditional expression within GetTextureType()Lioncash1-1/+1
Resolves a -Wlogical-op-parentheses warning.
2018-08-21shader_bytecode: Replace some UNIMPLEMENTED logs.bunnei1-2/+6
2018-08-19Shaders/TEXS: Fixed the component mask in the TEXS instruction.Subv1-6/+11
Previously we could end up with a TEXS that didn't write any outputs, this was wrong.
2018-08-19Shader: Added bitfields for the texture type of the various sampling instructions.Subv1-1/+65
2018-08-19Shaders: Added decodings for TLD4 and TLD4SSubv1-3/+7
2018-08-19Shaders: Added decodings for the LDG and STG instructions.Subv1-0/+4
2018-08-19Shaders: Implemented the gl_FrontFacing input attribute (attr 63).Subv1-0/+3
2018-08-18Shader: Implemented the predicate and mode arguments of LOP.Subv1-1/+6
The mode can be used to set the predicate to true depending on the result of the logic operation. In some cases, this means discarding the result (writing it to register 0xFF (Zero)). This is used by Super Mario Odyssey.
2018-08-18Shaders: Corrected the 'abs' and 'neg' bit usage in the float arithmetic instructions.Subv1-0/+4
We should definitely audit our shader generator for more errors like this.
2018-08-18Added predcondition GreaterThanWithNanDavid Marcec1-0/+1
2018-08-13gl_shader_decompiler: Implement XMAD instruction.bunnei1-4/+25
2018-08-12gl_shader_decompiler: Improve handling of unknown input/output attributes.bunnei1-2/+1
2018-08-11GPU/Shader: Don't predicate instructions that don't have a predicate field (SSY).Subv1-0/+7
2018-08-10video_core: Use variable template variants of type_traits interfaces where applicableLioncash1-2/+1
2018-08-08gl_shader_decompiler: Stub input attribute Unknown_63.bunnei1-0/+2
2018-08-08gl_shader_decompiler: Let OpenGL interpret floats.bunnei1-9/+4
- Accuracy is lost in translation to string, e.g. with NaN. - Needed for Super Mario Odyssey.
2018-07-22shader_bytecode: Implement other TEXS masks.bunnei1-5/+9
2018-07-22gl_shader_decompiler: Implement SEL instruction.bunnei1-0/+11
2018-07-21video_core: Use nested namespaces where applicableLioncash1-8/+4
Compresses a few namespace specifiers to be more compact.
2018-07-13gl_shader_decompiler: Implement PredCondition::LessThanWithNan.bunnei1-0/+1
2018-07-13gl_shader_decompiler: Use FlowCondition field in EXIT instruction.bunnei1-0/+9
2018-07-12GPU: Implement the FADD32I shader instruction.Subv1-0/+9
2018-07-12GPU: Corrected the decoding of FFMA for immediate operands.Subv1-1/+1
2018-07-04GPU: Implemented the IMNMX shader instruction.Subv1-3/+17
It's similar to the FMNMX instruction but it works on integers.
2018-07-04GPU: Stub the shader SYNC and DEPBAR instructions.Subv1-0/+5
It is unknown at this moment if we actually need to do something with these instructions or if the GLSL compiler takes care of that for us.
2018-07-04GPU: Corrected the decoding for the TEX shader instruction.Subv1-1/+1
2018-07-04GPU: Implemented the PSETP shader instruction.Subv1-0/+13
It's similar to the isetp and fsetp instructions but it works on predicates instead.
2018-07-03GPU: Implemented MUFU suboperation 8, sqrt.Subv1-0/+1
2018-06-30GPU: Corrected the size of the MUFU subop field, and removed incorrect "min" operation.Subv1-2/+1
2018-06-30gl_shader_decompiler: Implement predicate NotEqualWithNan.bunnei1-0/+1
2018-06-20Build: Fixed some MSVC warnings in various parts of the code.Subv1-2/+2
2018-06-19GPU: Don't mark uniform buffers and registers as used for instructions which don't have them.Subv1-2/+3
Like the MOV32I and FMUL32I instructions. This fixes a potential crash when using these instructions.
2018-06-17gl_shader_decompiler: Implement LOP instructions.bunnei1-0/+14
2018-06-17gl_shader_decompiler: Refactor LOP32I instruction a bit in support of LOP.bunnei1-3/+2
2018-06-16gl_shader_decompiler: Implement integer size conversions for I2I/I2F/F2I.bunnei1-1/+2
2018-06-12GPU: Implemented the iadd32i shader instruction.Subv1-2/+10
2018-06-12gl_shader_decompiler: Implement saturate for float instructions.bunnei1-2/+1
2018-06-09GPU: Implement the iset family of shader instructions.Subv1-0/+9
2018-06-09GPU: Added decodings for the ISET family of instructions.Subv1-0/+7
2018-06-09gl_shader_decompiler: Implement SHR instruction.bunnei1-0/+4
2018-06-09GPU: Stub the SSY shader instruction.Subv1-0/+2
This instruction tells the GPU where the flow reconverges in a non-uniform control flow scenario, we can ignore this when generating GLSL code.
2018-06-09gl_shader_decompiler: Implement IADD instruction.bunnei1-5/+11
2018-06-09gl_shader_decompiler: Add missing asserts for saturate_a instructions.bunnei1-1/+1
2018-06-07gl_shader_decompiler: Implement BFE_IMM instruction.bunnei1-3/+15
2018-06-07gl_shader_decompiler: F2F: Implement rounding modes.bunnei1-3/+12
2018-06-07shader_bytecode: Add instruction decodings for BFE, IMNMX, and XMAD.bunnei1-0/+20
2018-06-07gl_shader_decompiler: Implement LD_C instruction.bunnei1-0/+16
2018-06-06gl_shader_decompiler: Refactor uniform handling to allow different decodings.bunnei1-6/+10
2018-06-05GPU: Corrected the branch targets for the shader bra instruction.Subv1-4/+5
2018-06-05GPU: Implemented the F2I_R shader instruction.Subv1-4/+20
2018-06-05gl_shader_decompiler: Implement SHL instruction.bunnei1-13/+17
2018-06-05GPU: Implement the ISCADD shader instructions.Subv1-0/+16
2018-06-05GPU: Added decodings for the ISCADD instructions.Subv1-0/+7
2018-06-04GPU: Use the bf bit in FSET to determine whether to write 0xFFFFFFFF or 1.0f.Subv1-1/+1
2018-06-04GPU: Implemented the LOP32I instruction.Subv1-1/+15
2018-06-04GPU: Implemented the ISETP_R and ISETP_C shader instructions.Subv1-0/+10
2018-06-04GPU: Partially implemented the shader BRA instruction.Subv1-0/+13
2018-06-04GPU: Added decoding for the BRA instruction.Subv1-0/+2
2018-06-03gl_shader_decompiler: Implement TEXS component mask.bunnei1-2/+16
2018-06-03gl_shader_decompiler: Implement RRO as a register move.bunnei1-3/+7
2018-06-01gl_shader_decompiler: Implement TEX instruction.bunnei1-0/+10
2018-06-01gl_shader_decompiler: Support multi-destination for TEXS.bunnei1-0/+5
2018-05-30Shaders: Implemented reading the gl_InstanceID and gl_VertexID variables in the vertex shader.Subv1-0/+4
2018-05-30gl_shader_decompiler: Partially implement F2F_R instruction.bunnei1-3/+3
2018-05-26shader_bytecode: Implement other variants of FMNMX.bunnei1-3/+7
2018-05-21Shaders: Implemented the FMNMX shader instruction.Subv1-0/+5
2018-05-19ShadersDecompiler: Added decoding for the PSETP instruction.Subv1-0/+3
2018-04-29shader_bytecode: Add decoding for FMNMX instruction.bunnei1-0/+2
2018-04-29gl_shader_decompiler: Partially implement I2I_R, and I2F_R.bunnei1-8/+8
2018-04-29shader_bytecode: Add decodings for i2i instructions.bunnei1-3/+20
2018-04-29gl_shader_decompiler: Implement MOV32_IMM instruction.bunnei1-2/+2
2018-04-26gl_shader_decompiler: Boilerplate for handling integer instructions.bunnei1-1/+9
2018-04-25Shaders: Added bit decodings for the I2I instruction.Subv1-0/+6
2018-04-25Shaders: Added decodings for the FSET instructions.Subv1-8/+29
2018-04-21shader_bytecode: Add several more instruction decodings.bunnei1-5/+52
2018-04-21shader_bytecode: Decode instructions based on bit strings.bunnei1-185/+172
2018-04-21ShaderGen: Implemented predicated instruction execution.Subv1-1/+5
Each predicated instruction will be wrapped in an `if (predicate) { instruction_body; }` in the GLSL, where `predicate` is one of the predicate boolean variables previously set by fsetp.
2018-04-21ShaderGen: Implemented the fsetp instruction.Subv1-3/+40
Predicate variables are now added to the generated shader code in the form of 'pX' where X is the predicate id. These predicate variables are initialized to false on shader startup and are set via the fsetp instructions. TODO: * Not all the comparison types are implemented. * Only the single-predicate version is implemented.
2018-04-20ShaderGen: Register id 255 is special and is hardcoded to return 0 (SR_ZERO).Subv1-0/+3
2018-04-19ShaderGen: Implemented the fmul32i shader instruction.Subv1-3/+14
2018-04-18shader_bytecode: Make ctor's constexpr and explicit.bunnei1-7/+7
2018-04-17gl_shader_decompiler: Implement FMUL/FADD/FFMA immediate instructions.bunnei1-0/+14
2018-04-17gl_shader_decompiler: Add support for TEXS instruction.bunnei1-5/+14
2018-04-15shaders: Add NumTextureSamplers const, remove unused #pragma.bunnei1-2/+0
2018-04-14shaders: Address PR review feedback.bunnei1-1/+1
2018-04-14shaders: Fix GCC and clang build issues.bunnei1-3/+3
2018-04-14gl_shader_decompiler: Implement negate, abs, etc. and lots of cleanup.bunnei1-20/+39
2018-04-14shader_bytecode: Add FSETP and KIL to GetInfo.bunnei1-0/+3
2018-04-14shader_bytecode: Add SubOp decoding.bunnei1-0/+10
2018-04-14shader_bytecode: Add initial module for shader decoding.bunnei1-0/+297
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-21 11:40:05 +0200