diff options
author | Kevin Hartman <kevin@hart.mn> | 2015-02-22 02:20:08 +0100 |
---|---|---|
committer | Kevin Hartman <kevin@hart.mn> | 2015-02-22 02:25:31 +0100 |
commit | 05c098a9e77235069c2bbfc7f13aa5d5f8601d88 (patch) | |
tree | ff2e0d787c7d8f5a10c67c21d059a819afc21463 | |
parent | Merge pull request #587 from archshift/assert (diff) | |
download | yuzu-05c098a9e77235069c2bbfc7f13aa5d5f8601d88.tar yuzu-05c098a9e77235069c2bbfc7f13aa5d5f8601d88.tar.gz yuzu-05c098a9e77235069c2bbfc7f13aa5d5f8601d88.tar.bz2 yuzu-05c098a9e77235069c2bbfc7f13aa5d5f8601d88.tar.lz yuzu-05c098a9e77235069c2bbfc7f13aa5d5f8601d88.tar.xz yuzu-05c098a9e77235069c2bbfc7f13aa5d5f8601d88.tar.zst yuzu-05c098a9e77235069c2bbfc7f13aa5d5f8601d88.zip |
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 19 | ||||
-rw-r--r-- | src/core/mem_map_funcs.cpp | 18 |
2 files changed, 2 insertions, 35 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index b691ffbc3..3b508f617 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -4422,12 +4422,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) { inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); unsigned int value = Memory::Read32(addr); - if (BIT(CP15_REG(CP15_CONTROL), 22) == 1) - cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; - else { - value = ROTATE_RIGHT_32(value,(8*(addr&0x3))); - cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; - } + cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; if (BITS(inst_cream->inst, 12, 15) == 15) { // For armv5t, should enter thumb when bits[0] is non-zero. @@ -4450,12 +4445,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) { inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); unsigned int value = Memory::Read32(addr); - if (BIT(CP15_REG(CP15_CONTROL), 22) == 1) - cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; - else { - value = ROTATE_RIGHT_32(value,(8*(addr&0x3))); - cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; - } + cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; if (BITS(inst_cream->inst, 12, 15) == 15) { // For armv5t, should enter thumb when bits[0] is non-zero. @@ -4699,11 +4689,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) { unsigned int value = Memory::Read32(addr); cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; - if (BIT(CP15_REG(CP15_CONTROL), 22) == 1) - cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; - else - cpu->Reg[BITS(inst_cream->inst, 12, 15)] = ROTATE_RIGHT_32(value,(8*(addr&0x3))) ; - if (BITS(inst_cream->inst, 12, 15) == 15) { INC_PC(sizeof(ldst_inst)); goto DISPATCH; diff --git a/src/core/mem_map_funcs.cpp b/src/core/mem_map_funcs.cpp index 4f93c0e64..48f61db4e 100644 --- a/src/core/mem_map_funcs.cpp +++ b/src/core/mem_map_funcs.cpp @@ -236,30 +236,12 @@ u8 Read8(const VAddr addr) { u16 Read16(const VAddr addr) { u16_le data = 0; Read<u16_le>(data, addr); - - // Check for 16-bit unaligned memory reads... - if (addr & 1) { - // TODO(bunnei): Implement 16-bit unaligned memory reads - LOG_ERROR(HW_Memory, "16-bit unaligned memory reads are not implemented!"); - } - return (u16)data; } u32 Read32(const VAddr addr) { u32_le data = 0; Read<u32_le>(data, addr); - - // Check for 32-bit unaligned memory reads... - if (addr & 3) { - // ARM allows for unaligned memory reads, however older ARM architectures read out memory - // from unaligned addresses in a shifted way. Our ARM CPU core (SkyEye) corrects for this, - // so therefore expects the memory to be read out in this manner. - // TODO(bunnei): Determine if this is necessary - perhaps it is OK to remove this from both - // SkyEye and here? - int shift = (addr & 3) * 8; - data = (data << shift) | (data >> (32 - shift)); - } return (u32)data; } |