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authorLioncash <mathew1800@gmail.com>2014-12-16 02:16:38 +0100
committerLioncash <mathew1800@gmail.com>2014-12-16 02:47:27 +0100
commit1c7f77334c32fe304b1db22f6bae210c837ba40f (patch)
treec4d15e85facb5c9b5f186ed010076e4c5c353598
parentMerge pull request #281 from lioncash/uxtb16 (diff)
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-rw-r--r--src/core/arm/interpreter/armemu.cpp35
1 files changed, 25 insertions, 10 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index 33ebc7986..b846fbe9c 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -6101,17 +6101,32 @@ L_stm_s_takeabort:
return 1;
}
- case 0x6c:
- if ((instr & 0xf03f0) == 0xf0070) { //uxtb16
- u8 rm_idx = BITS(0, 3);
- u8 rd_idx = BITS(12, 15);
- u32 rm_val = state->Reg[rm_idx];
- u32 rotation = BITS(10, 11) * 8;
- u32 in = ((rm_val << (32 - rotation)) | (rm_val >> rotation));
- state->Reg[rd_idx] = in & 0x00FF00FF;
+ case 0x6c: // UXTB16 and UXTAB16
+ {
+ const u8 rm_idx = BITS(0, 3);
+ const u8 rn_idx = BITS(16, 19);
+ const u8 rd_idx = BITS(12, 15);
+ const u32 rm_val = state->Reg[rm_idx];
+ const u32 rn_val = state->Reg[rn_idx];
+ const u32 rotation = BITS(10, 11) * 8;
+ const u32 rotated_rm = ((rm_val << (32 - rotation)) | (rm_val >> rotation));
+
+ // UXTB16
+ if ((instr & 0xf03f0) == 0xf0070) {
+ state->Reg[rd_idx] = rotated_rm & 0x00FF00FF;
+ }
+ else { // UXTAB16
+ const u8 lo_rotated = (rotated_rm & 0xFF);
+ const u16 lo_result = (rn_val & 0xFFFF) + (u16)lo_rotated;
+
+ const u8 hi_rotated = (rotated_rm >> 16) & 0xFF;
+ const u16 hi_result = (rn_val >> 16) + (u16)hi_rotated;
+
+ state->Reg[rd_idx] = ((hi_result << 16) | (lo_result & 0xFFFF));
+ }
+
return 1;
- } else
- printf ("Unhandled v6 insn: uxtab16\n");
+ }
break;
case 0x6e: {
ARMword Rm;