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| author | Lioncash <mathew1800@gmail.com> | 2015-03-09 02:48:35 +0100 |
|---|---|---|
| committer | Lioncash <mathew1800@gmail.com> | 2015-03-09 03:03:06 +0100 |
| commit | 36dab56c31e05f4b01a9fec5052ef8154c34a93c (patch) | |
| tree | a7ce1e7843aab9b68c9f244722bff8984d086def | |
| parent | dyncom: Increment addr when accessing LR in LDM (diff) | |
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| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 81ab5cd21..ba09c58b7 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -5983,47 +5983,45 @@ unsigned InterpreterMainLoop(ARMul_State* state) { inst_cream->get_addr(cpu, inst_cream->inst, addr, 0); if (BIT(inst_cream->inst, 22) == 1) { for (i = 0; i < 13; i++) { - if(BIT(inst_cream->inst, i)) { + if (BIT(inst_cream->inst, i)) { Memory::Write32(addr, cpu->Reg[i]); addr += 4; } } if (BIT(inst_cream->inst, 13)) { - if (cpu->Mode == USER32MODE) { + if (cpu->Mode == USER32MODE) Memory::Write32(addr, cpu->Reg[i]); - addr += 4; - } else { + else Memory::Write32(addr, cpu->Reg_usr[0]); - addr += 4; - } + + addr += 4; } if (BIT(inst_cream->inst, 14)) { - if (cpu->Mode == USER32MODE) { + if (cpu->Mode == USER32MODE) Memory::Write32(addr, cpu->Reg[i]); - addr += 4; - } else { + else Memory::Write32(addr, cpu->Reg_usr[1]); - addr += 4; - } + + addr += 4; } if (BIT(inst_cream->inst, 15)) { Memory::Write32(addr, cpu->Reg_usr[1] + 8); } } else { - for( i = 0; i < 15; i++ ) { - if(BIT(inst_cream->inst, i)) { - if(i == Rn) + for (i = 0; i < 15; i++) { + if (BIT(inst_cream->inst, i)) { + if (i == Rn) Memory::Write32(addr, old_RN); else Memory::Write32(addr, cpu->Reg[i]); + addr += 4; } } // Check PC reg - if(BIT(inst_cream->inst, i)) { + if (BIT(inst_cream->inst, 15)) Memory::Write32(addr, cpu->Reg_usr[1] + 8); - } } } cpu->Reg[15] += GET_INST_SIZE(cpu); |