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authorFernandoS27 <fsahmkow27@gmail.com>2021-04-14 08:00:41 +0200
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-23 03:51:27 +0200
commitab3831f6cb87d7f0a337cef6ecb4b1f63bfb0bb5 (patch)
tree5c407077d2f0c4fe88985813789ddc3b141a40d8
parentspirv: Fix non-atomic 64-bit store (diff)
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-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_special.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp
index 8bb94f546..ae8b39f41 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp
@@ -65,6 +65,10 @@ void AlphaTest(EmitContext& ctx) {
if (comparison == CompareFunction::Always) {
return;
}
+ if (!Sirit::ValidId(ctx.frag_color[0])) {
+ return;
+ }
+
const Id type{ctx.F32[1]};
const Id rt0_color{ctx.OpLoad(ctx.F32[4], ctx.frag_color[0])};
const Id alpha{ctx.OpCompositeExtract(type, rt0_color, 3u)};
@@ -74,6 +78,7 @@ void AlphaTest(EmitContext& ctx) {
const Id alpha_reference{ctx.Constant(ctx.F32[1], ctx.profile.alpha_test_reference)};
const Id condition{ComparisonFunction(ctx, comparison, alpha, alpha_reference)};
+ ctx.OpSelectionMerge(true_label, spv::SelectionControlMask::MaskNone);
ctx.OpBranchConditional(condition, true_label, discard_label);
ctx.AddLabel(discard_label);
ctx.OpKill();